Re: [PATCH v2 09/19] PCI/TSM: Support creating encrypted MMIO descriptors via TDISP Report

[Jason Gunthorpe <jgg@nvidia.com>]

On Fri, Mar 27, 2026 at 10:38:15AM +1100, Alexey Kardashevskiy wrote:
> 
> 
> On 24/3/26 05:20, Jason Gunthorpe wrote:
> > On Mon, Mar 16, 2026 at 04:19:30PM +1100, Alexey Kardashevskiy wrote:
> > 
> > > and btw this only works if the entity generating the MMIO reporting
> > > offset (==TSM) knows about BARs sizes, which is not the case for AMD
> > > - the FW has no access to the config space (so the HV needs to feed
> > > this to the FW? may be). Thanks,
> > 
> > Then your platform just shouldn't use the mmio offset feature. Set it
> > to 0 always.
> 
> pcie r7, Table 11-16 TDI Report Structure, MMIO_RANGE:
> 
> "Each MMIO Range of the TDI is reported with the MMIO reporting offset added."
> 
> My english struggles here - can the above be interpreted as "Each reported MMIO Range ..."?
> 
> as if it is each (except msix), then I know where msix is and can
> amend the report inside the VM if msix is not locked. Thanks,

To do this you must be convert between the offset'd and phys_addr_t
versions otherwise you have no idea where the translated ones fall
within the BAR, so you can't figure out if msix is covered or not.

Jason