From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pf1-f201.google.com (mail-pf1-f201.google.com [209.85.210.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4D58235E1A2 for ; Fri, 15 May 2026 19:20:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778872830; cv=none; b=VyVdiJFb0Q1X4yxgpKoyRps0yem5IhHfduhUj0zqX5aXrpbd+TUi+MeAOgSHVxA/wbr1+XUHzWhxLmvLV33PTm7sre3ecYQP61sSiA0J+LLx0wGcfJzj+g3jaVXqFzSVO+526Yj7RmXAaOpeTex7yvl/NU99UglAi+p9V0aQ2lY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778872830; c=relaxed/simple; bh=EM4Aa/jhLL0HBAZa7II73CeQqmh6W0AY88xO0q2PZyY=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Cc:Content-Type; b=U/ZYoVByJfHI0Qj9uINAQJ94chPNJ2tXKDPnW1r467y9KJhamhNxzDmktSVy85SydoXeEGBMZRJf70SuRqAablVRHDqhYZfcvv/FNId+Cmj8deFUgSbAIEkwpazsmLjvz31aLB5DqXMpMN8mT633cp11DXsrNUtqjZpK+xvee0E= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=t/jBs+Fg; arc=none smtp.client-ip=209.85.210.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="t/jBs+Fg" Received: by mail-pf1-f201.google.com with SMTP id d2e1a72fcca58-835444b6ce1so196694b3a.1 for ; Fri, 15 May 2026 12:20:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20251104; t=1778872828; x=1779477628; darn=lists.linux.dev; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=f8J88NcF7oH9XUSV/4XAna5n7NY6XY4d9JdR9Rumg2w=; b=t/jBs+Fg4bXRL/xgRHWFyd+ESNkbHT+d4OkB6ZUpRDv1njkazvSjCAMyM1CPuTOKVc 0X/O9MuK/lhCKeAecEUbBrqRb+CpQYwmncWgcp7c62pk8UMelNEWGa3k4Rt6w9ieLR8j 7udp7k1XjC6QeqgIDWzvpnzB6Jya+df34VDJi5hbLv9XrIhZsObI5VqmRqmPU/OSoUBs DzvLBIk/2lRAG10hHyFEoY6NtynUnmroRpr5SZ2EqKHLUe5o8Px+CGja37tds5aBJiQw GxlQDH9N14T7Q3wvfVhZszXUXgyOVouvHMl0ovuGzyCGIBks9DUw3IIjuYPxhR6A2sBh 03XA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778872828; x=1779477628; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=f8J88NcF7oH9XUSV/4XAna5n7NY6XY4d9JdR9Rumg2w=; b=RBk7BKn5fSTMIKoq86tzR3D2Db+nqttJmTyCv6Ozxru2p0dkfGXJaJk33a3Mjb9Wxj WZ5jm7iAE9XhirtGFKTgWCJN8pulNwrHORzHuMHAdaWtIhAqt5kWQTP5vYE3coPX/MHD QbHEc/IRFf7PJ8L4pgjzb/6e5xVp6UZ/vftMsw6KSknq6tojP4zAcxaNZb8fB/84tQR+ VdgPuhyZ6jkjQtO9EXX35dBVfQn1zAiLc6y37nlRfS/bMe1zw09NrtJWkmGTxV/eht06 WxG16ItRQI19seDKyX8h1uSs95Cf6LjMd7SJrSUDxtiFYsQsJUm94UzZJj1k2ogj0KHY Vtig== X-Forwarded-Encrypted: i=1; AFNElJ8mZISguGeSW2cXHJxBaITndZKWaQceeVhAv/S3IQBA5G/jQKghjqQmsjjP0ti1vy9UvAD3v9czKRXq@lists.linux.dev X-Gm-Message-State: AOJu0YyrY6cc0dGXonwCt4CSjKzJ7kgFj4kzCSyEj9ADFA0g9W8WgyTC 4UDjVoLIt/EFwxAJYa1SReVH3k+snNMtpDPa+RvoUMYeCVFCF3mFmuM34NyoFM4AJ+YgGTEkCfI C3hNxjQ== X-Received: from pfch22.prod.google.com ([2002:a05:6a00:1716:b0:82f:6a26:5f78]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a00:12e4:b0:835:405a:7e68 with SMTP id d2e1a72fcca58-83f33d9dd83mr5936320b3a.32.1778872827310; Fri, 15 May 2026 12:20:27 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 15 May 2026 12:19:04 -0700 In-Reply-To: <20260515191942.1892718-1-seanjc@google.com> Precedence: bulk X-Mailing-List: linux-coco@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20260515191942.1892718-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.563.g4f69b47b94-goog Message-ID: <20260515191942.1892718-4-seanjc@google.com> Subject: [PATCH v3 03/41] x86/sev: Mark TSC as reliable when configuring Secure TSC From: Sean Christopherson To: Kiryl Shutsemau , Paolo Bonzini , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" Move the code to mark the TSC as reliable from sme_early_init() to snp_secure_tsc_init(). The only reader of TSC_RELIABLE is the aptly named check_system_tsc_reliable(), which runs in tsc_init(), i.e. after snp_secure_tsc_init(). This will allow consolidating the handling of TSC_KNOWN_FREQ and TSC_RELIABLE when overriding the TSC calibration routine. Cc: Tom Lendacky Reviewed-by: Nikunj A Dadhania Signed-off-by: Sean Christopherson --- arch/x86/coco/sev/core.c | 2 ++ arch/x86/mm/mem_encrypt_amd.c | 3 --- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/arch/x86/coco/sev/core.c b/arch/x86/coco/sev/core.c index d27cf8f8b025..14ced854cd83 100644 --- a/arch/x86/coco/sev/core.c +++ b/arch/x86/coco/sev/core.c @@ -2041,6 +2041,8 @@ void __init snp_secure_tsc_init(void) secrets = (__force struct snp_secrets_page *)mem; setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); + setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE); + rdmsrq(MSR_AMD64_GUEST_TSC_FREQ, tsc_freq_mhz); /* Extract the GUEST TSC MHZ from BIT[17:0], rest is reserved space */ diff --git a/arch/x86/mm/mem_encrypt_amd.c b/arch/x86/mm/mem_encrypt_amd.c index 2f8c32173972..6c3af974c7c2 100644 --- a/arch/x86/mm/mem_encrypt_amd.c +++ b/arch/x86/mm/mem_encrypt_amd.c @@ -535,9 +535,6 @@ void __init sme_early_init(void) */ x86_init.resources.dmi_setup = snp_dmi_setup; } - - if (sev_status & MSR_AMD64_SNP_SECURE_TSC) - setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE); } void __init mem_encrypt_free_decrypted_mem(void) -- 2.54.0.563.g4f69b47b94-goog