From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pf1-f201.google.com (mail-pf1-f201.google.com [209.85.210.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 560BA4DB56A for ; Wed, 1 Jul 2026 19:32:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782934366; cv=none; b=iylmA6vIiF2fyBXU3nTAiFT9Ka3/3iJ7ACQEwbeZoTkUt4irT1jzkEcntS5nF2qaw97kL0ysW8jyCT/PvYn5bakMacxt8swclNgsOnWl+2QMFZePH0qNAbNoSQ9eqyDFpM3GQUE7CEkyCK4aCdjEhOwNCUgrzoP91WhUrVwrN0s= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782934366; c=relaxed/simple; bh=Gnih5LrGkG8ktdHYV+2HKjvX94Rde895YkWyNLJNx+Q=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Cc:Content-Type; b=lJAPbidpbfeNhtpooqPZKHZPIHLFlnDroYjXSfwWkmBPK7C33UasPHbaloq+A6BD4Mr2hC3qU0oLFUKYKAvn0Djq1sv0jtnn1BVovL9ektsaLHhOMq+FvSMtpRVUnVdvPVoWpUwdu+hO+2/x5EnvP780CadUoVoV4hZ+XFwYLxM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=bOy82dkQ; arc=none smtp.client-ip=209.85.210.201 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="bOy82dkQ" Received: by mail-pf1-f201.google.com with SMTP id d2e1a72fcca58-8478947e047so912409b3a.3 for ; Wed, 01 Jul 2026 12:32:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20251104; t=1782934363; x=1783539163; darn=lists.linux.dev; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=JEJEfFzkyRhChopEv3/Eo+3SUmzyKJlolrUUxvPFGQs=; b=bOy82dkQeT4Dpb2z9fwAf4LapN6xjjdUlnFXDB0/DnTYImsWPV6cMHuHaiKDsqrwPd hWBiPSAo+ymtmCEcEt6jww8UmhSAOJDBc17trZYWvmT8XvVUvQbnBwmecCcPcA36tf5w yBQdxCTr+EaYMXWsSlSXKIaQMC9kMi02zsMKBE/1OzAg4xyOXAJc+SPSzNtsWzBuhewh EFEEQ9ltrVBWTV7O+/Bjf57TnSWer7zYdMBoIy7QdY6vJWFkyr08pBSHQKSqa+pkSY0D jqfYPMV7Frm13JOsUtKR1jMY0L8QXEKF020A/c4hWUHcm7shjUq7+Jfuz3jP4Io2eVKX 8a5w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1782934363; x=1783539163; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=JEJEfFzkyRhChopEv3/Eo+3SUmzyKJlolrUUxvPFGQs=; b=eC1VmyXjQkCd3bVCewN/QiJ5f+ZRwAcHVsFxQj+tyfe8hb9H/XnfyfWWyBf0UOrfpq hi1k1cULNPfY379IBGY3hqv/34ITqPnbjck77oswuQx+uLxKjrXMZu31kOBbs32PejO7 h2UfLH+PSTIBspgu9EJA4tnhOkwHNlprFsOcBZd1G4U0Jo2cxNZuY8ffICdeYXk9OvMJ yAiy2v4sM5VG6kQV/Dofb0IkK5ZaXj9iLsvAuxGpTk9WEhPMzVXpef6G7SXPen6b4xhE ppqaKZxyIK6vJsckIAwgGJ4Flg2u1/2KX/ZRwdaxbwlxF9GeTp90Ri5JYgScIYSaEiZn cxZA== X-Forwarded-Encrypted: i=1; AFNElJ+xiS6fMQcZa+Gk2EsAW2I6uyyOAAxhyRmiVVjtxp9IAkcyyvt6G+raKe9Z+Mrade9ber9vhC4Mc3wM@lists.linux.dev X-Gm-Message-State: AOJu0Yw+rJcvM/ivoOBqOOuLD/cvc4BIK0UzJ7N2nnOqMYUC7vpBlPcL Q5sVQrkW22tzmL/MMteisB15ahyJ5NtMJB34qVSUy9W3yqSCVQXm+iSgGEqNPX0cRitvynlGHQE DIU4thA== X-Received: from pgbda6.prod.google.com ([2002:a05:6a02:2386:b0:c99:7baf:125f]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a20:7288:b0:3bf:b1f4:747b with SMTP id adf61e73a8af0-3bfed0e2904mr3197752637.12.1782934363113; Wed, 01 Jul 2026 12:32:43 -0700 (PDT) Reply-To: Sean Christopherson Date: Wed, 1 Jul 2026 12:31:35 -0700 In-Reply-To: <20260701193212.749551-1-seanjc@google.com> Precedence: bulk X-Mailing-List: linux-coco@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20260701193212.749551-1-seanjc@google.com> X-Mailer: git-send-email 2.55.0.rc0.799.gd6f94ed593-goog Message-ID: <20260701193212.749551-15-seanjc@google.com> Subject: [PATCH v5 14/51] x86/tsc: Consolidate forcing of X86_FEATURE_TSC_KNOWN_FREQ for PV code From: Sean Christopherson To: Jonathan Corbet , Paolo Bonzini , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, Kiryl Shutsemau , Rick Edgecombe , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: Shuah Khan , "H. Peter Anvin" , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , linux-doc@vger.kernel.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, Tom Lendacky , Nikunj A Dadhania , David Woodhouse , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" Now that all paravirt code that explicitly specifies the TSC frequency also sets X86_FEATURE_TSC_KNOWN_FREQ, replace all of the one-off code and simply set X86_FEATURE_TSC_KNOWN_FREQ if the TSC frequency is known. Do NOT force set TSC_KNOWN_FREQ if the "known" TSC frequency was provided by the user. Per commit bd35c77e32e4 ("x86/tsc: Add tsc_early_khz command line parameter"), one of the goals of the param is to allow the refined calibration work "to do meaningful error checking". No functional change intended. Signed-off-by: Sean Christopherson --- arch/x86/coco/sev/core.c | 1 - arch/x86/coco/tdx/tdx.c | 1 - arch/x86/kernel/cpu/acrn.c | 1 - arch/x86/kernel/cpu/mshyperv.c | 1 - arch/x86/kernel/cpu/vmware.c | 2 -- arch/x86/kernel/jailhouse.c | 1 - arch/x86/kernel/kvmclock.c | 1 - arch/x86/kernel/tsc.c | 13 ++++++++++--- arch/x86/xen/time.c | 1 - 9 files changed, 10 insertions(+), 12 deletions(-) diff --git a/arch/x86/coco/sev/core.c b/arch/x86/coco/sev/core.c index bc5ae9ef74da..72313b36b6f5 100644 --- a/arch/x86/coco/sev/core.c +++ b/arch/x86/coco/sev/core.c @@ -2027,7 +2027,6 @@ unsigned int __init snp_secure_tsc_init(void) secrets = (__force struct snp_secrets_page *)mem; - setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE); rdmsrq(MSR_AMD64_GUEST_TSC_FREQ, tsc_freq_mhz); diff --git a/arch/x86/coco/tdx/tdx.c b/arch/x86/coco/tdx/tdx.c index ae2d35f2ef33..94682aca188b 100644 --- a/arch/x86/coco/tdx/tdx.c +++ b/arch/x86/coco/tdx/tdx.c @@ -1205,7 +1205,6 @@ unsigned int __init tdx_tsc_init(void) /* TSC is the only reliable clock in TDX guest */ setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE); - setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); return info.crystal_khz * info.numerator / info.denominator; } diff --git a/arch/x86/kernel/cpu/acrn.c b/arch/x86/kernel/cpu/acrn.c index 3818f6ae0629..dc71a6fdd461 100644 --- a/arch/x86/kernel/cpu/acrn.c +++ b/arch/x86/kernel/cpu/acrn.c @@ -40,7 +40,6 @@ static void __init acrn_init_platform(void) if (acrn_tsc_khz_cpuid) { x86_init.hyper.get_tsc_khz = acrn_get_tsc_khz; x86_init.hyper.get_cpu_khz = acrn_get_tsc_khz; - setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); } } diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c index f9bc1c2d8c93..e03c69a4db33 100644 --- a/arch/x86/kernel/cpu/mshyperv.c +++ b/arch/x86/kernel/cpu/mshyperv.c @@ -575,7 +575,6 @@ static void __init ms_hyperv_init_platform(void) ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) { x86_init.hyper.get_tsc_khz = hv_get_tsc_khz; x86_init.hyper.get_cpu_khz = hv_get_tsc_khz; - setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); } if (ms_hyperv.priv_high & HV_ISOLATION) { diff --git a/arch/x86/kernel/cpu/vmware.c b/arch/x86/kernel/cpu/vmware.c index 3cb473cae462..0a3bd90576d4 100644 --- a/arch/x86/kernel/cpu/vmware.c +++ b/arch/x86/kernel/cpu/vmware.c @@ -390,8 +390,6 @@ static void __init vmware_set_capabilities(void) { setup_force_cpu_cap(X86_FEATURE_CONSTANT_TSC); setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE); - if (vmware_tsc_khz) - setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); if (vmware_hypercall_mode == CPUID_VMWARE_FEATURES_ECX_VMCALL) setup_force_cpu_cap(X86_FEATURE_VMCALL); else if (vmware_hypercall_mode == CPUID_VMWARE_FEATURES_ECX_VMMCALL) diff --git a/arch/x86/kernel/jailhouse.c b/arch/x86/kernel/jailhouse.c index e24c05ab4fae..ff173052cdce 100644 --- a/arch/x86/kernel/jailhouse.c +++ b/arch/x86/kernel/jailhouse.c @@ -255,7 +255,6 @@ static void __init jailhouse_init_platform(void) pr_debug("Jailhouse: PM-Timer IO Port: %#x\n", pmtmr_ioport); precalibrated_tsc_khz = setup_data.v1.tsc_khz; - setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); pci_probe = 0; diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index 4f8299303a19..35a879d33e9e 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -138,7 +138,6 @@ static inline void kvm_sched_clock_init(bool stable) */ static unsigned int __init kvm_get_tsc_khz(void) { - setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); return pvclock_tsc_khz(this_cpu_pvti()); } diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 1dca9464b41c..676910292af7 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -1541,11 +1541,18 @@ void __init tsc_early_init(void) if (!known_tsc_khz && x86_init.hyper.get_tsc_khz) known_tsc_khz = x86_init.hyper.get_tsc_khz(); + /* + * Mark the TSC frequency as known if it was obtained from a hypervisor + * or trusted firmware. + */ + if (known_tsc_khz) + setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); + /* * Ignore the user-provided TSC frequency if the exact frequency was - * obtained from trusted firmware or the hypervisor, as the user- - * provided frequency is intended as a "starting point", not a known, - * guaranteed frequency. + * obtained from trusted firmware or the hypervisor, and don't mark the + * frequency as known, as the user-provided frequency is intended as a + * "starting point", not a known, guaranteed frequency */ if (!known_tsc_khz) known_tsc_khz = tsc_early_khz; diff --git a/arch/x86/xen/time.c b/arch/x86/xen/time.c index 1adb44fdddb2..487ad838c441 100644 --- a/arch/x86/xen/time.c +++ b/arch/x86/xen/time.c @@ -43,7 +43,6 @@ static unsigned int __init xen_tsc_khz(void) struct pvclock_vcpu_time_info *info = &HYPERVISOR_shared_info->vcpu_info[0].time; - setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); return pvclock_tsc_khz(info); } -- 2.55.0.rc0.799.gd6f94ed593-goog