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[199.106.103.254]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-33e96e48e3esm357539eec.26.2026.09.22.12.25.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Sep 2026 12:25:46 -0700 (PDT) Date: Tue, 22 Sep 2026 12:25:42 -0700 From: Jonathan Cameron To: Suzuki K Poulose Cc: kvm@vger.kernel.org, kvmarm@lists.linux.dev, maz@kernel.org, will@kernel.org, catalin.marinas@arm.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, steven.price@arm.com, aneesh.kumar@kernel.org, oupton@kernel.org, gshan@redhat.com, joey.gouly@arm.com, tabba@google.com, yuzenghui@huawei.com, linux-coco@lists.linux.dev, gankulkarni@os.amperecomputing.com, sdonthineni@nvidia.com, alpergun@google.com, fj0570is@fujitsu.com, WeiLin.Chang@arm.com, lpieralisi@kernel.org, enju.kohei@fujitsu.com Subject: Re: [PATCH v19 01/20] KVM: arm64: protected VM: Handle user writes to CNTVCT_EL0/CNTPCT_EL0 Message-ID: <20260922122542.00006868@oss.qualcomm.com> In-Reply-To: <20260920212845.707-2-suzuki.poulose@arm.com> References: <20260920212845.707-1-suzuki.poulose@arm.com> <20260920212845.707-2-suzuki.poulose@arm.com> Organization: Qualcomm X-Mailer: Claws Mail 4.4.0 (GTK 3.24.51; x86_64-w64-mingw32) Precedence: bulk X-Mailing-List: linux-coco@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: e1pIvpjgb2PqWXFnA_6tqTdq064bIR_J X-Authority-Analysis: v=2.4 cv=KqHYSmWN c=1 sm=1 tr=0 ts=6ab2d63c cx=c_pps a=Uww141gWH0fZj/3QKPojxA==:117 a=JYp8KDb2vCoCEuGobkYCKw==:17 a=kj9zAlcOel0A:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=VwQbUJbxAAAA:8 a=7CQSdrXTAAAA:8 a=wrk9ooTvwJDonXvhXhMA:9 a=CjuIK1q_8ugA:10 a=PxkB5W3o20Ba91AHUih5:22 a=a-qgeE7W1pNrGK8U0ZQC:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTIyMDI4NSBTYWx0ZWRfX00VpaboQ8CFx jhrkcJ5e8qlAl31wWhfxlSYdj0MINcomnZnevDa7e3BczeTyEHzysAX0sWptLWDIlvUCJCmZWHo a9zcxaIDt5kdLBW82N7Mv3qDcT7Ec5OmOaX4gtc6dBFBR0fUnHXIP7L5iniYAq9XMtBFqju8cVO ulz3zJdMfKXdFkiMYUFHq1siFZ75Tqi3eDO9RZLRSphUgrOVlBpjggc5qkoeiNai+p5Jwqo4GVk izIew+hiVs3m7gSI9gVc2fP2wDSMyrIZIR+njrgG5YCylO6lOi0uXZmu+5ZFUbd+lKMlMk1tosn FTlSG2z+/v7PCypjnOA/F6khl8WPjJ72JoousjmIoe4sa35mAHW/i+CT6tQlhUkHtp2K1GTPaow J0Yi1Cnbl6VfYCfGK9+AIzapv44vrdKOWsk+IC5XKWBEApW/xXjYyJ8BQczIYbgfcQ6kP3cSko+ ebifNrIoX/yNVCUtu3Q== X-Proofpoint-ORIG-GUID: e1pIvpjgb2PqWXFnA_6tqTdq064bIR_J X-Proofpoint-Spam-Info: AW1haW4tMjYwOTIyMDI4NSBTYWx0ZWRfX7LQ2S8fCsQty 81047FR4a4moKvEIbLTbxhDJ4/1oyZqv+jm+Y2fn+mM7EstSXSt5pCEFhF6Q07H1+eMMfTLxJW/ NZJ6tkuTnLdzalTvkbT1wF7Geojx1DE= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-22_03,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 spamscore=0 bulkscore=0 priorityscore=1501 phishscore=0 malwarescore=0 suspectscore=0 clxscore=1015 adultscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609220285 On Sun, 20 Sep 2026 22:28:26 +0100 Suzuki K Poulose wrote: Hi Suzuki, > Protected VMs doesn't allow setting offsets for virtual and phyiscal physical > counters, as the offset is always fixed to 0. The VM ioclt is filtered ioctl > out based on the cap. However we don't prevent the userspace from trying > to write to the CNTVCT/CNTPCT registers. This would lead to KVM triggering > a WARN() in timer_set_offset() as the vm_offset pointer is set to NULL. > > Fix this by always "fixing" the timer offsets to 0 and marking that the > timer offset is set in the kvm->arch.flags at KVM init time for protected > VMs. A userspace writing to the CNT*CT_EL0 would observe success, without > any real effect. This was chosen over preventing the writes to these > registers and returning -EPERM. Why? I don't mind the decision but telling us what was chosen is something we can see in the code - patch description should give us the stuff we can't see. One comment on the comment below. > > Reported by Sashiko > > Link: https://lore.kernel.org/all/20260908164641.416911F00A3A@smtp.kernel.org > Fixes: f7d05ee84a6a ("KVM: arm64: Prevent host from managing timer offsets for protected VMs") > Suggested-by: Marc Zyngier > Signed-off-by: Suzuki K Poulose > --- > Changes since v18: > - Retain NULL vm_offset for protected VMs to avoid host tampering with the > offset. > - Moved the flag setting into kvm_timer_init_vm(), where it should have been > in the first place > --- > arch/arm64/kvm/arch_timer.c | 12 ++++++++++-- > 1 file changed, 10 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/kvm/arch_timer.c b/arch/arm64/kvm/arch_timer.c > index 6ac3321f4c575..226cd5a495c8b 100644 > --- a/arch/arm64/kvm/arch_timer.c > +++ b/arch/arm64/kvm/arch_timer.c > @@ -1110,8 +1110,7 @@ void kvm_timer_vcpu_init(struct kvm_vcpu *vcpu) > timer_context_init(vcpu, i); > > /* Synchronize offsets across timers of a VM if not already provided */ > - if (!vcpu_is_protected(vcpu) && > - !test_bit(KVM_ARCH_FLAG_VM_COUNTER_OFFSET, &vcpu->kvm->arch.flags)) { > + if (!test_bit(KVM_ARCH_FLAG_VM_COUNTER_OFFSET, &vcpu->kvm->arch.flags)) { > timer_set_offset(vcpu_vtimer(vcpu), kvm_phys_timer_read()); > timer_set_offset(vcpu_ptimer(vcpu), 0); > } > @@ -1133,6 +1132,15 @@ void kvm_timer_init_vm(struct kvm *kvm) > */ > for (int i = 0; i < NR_KVM_TIMERS; i++) > kvm->arch.timer_data.ppi[i] = get_vgic_ppi(kvm, default_ppi[i]); > + > + /* > + * Protected VMs don't allow any offset being set from userspace, > + * either set via writes to the counters or using the dedicated This sentence confused me. Second clause isn't obviously the ways that are being blocked. Maybe shorten to: Protected VMs don't allow the offset to be set from userspace, whether via writes to the counters or the dedicated ioctl. > + * ioctl. Pretend the offset has already been set and rely on the > + * default offset being 0. > + */ > + if (kvm_vm_is_protected(kvm)) > + set_bit(KVM_ARCH_FLAG_VM_COUNTER_OFFSET, &kvm->arch.flags); > } > > void kvm_timer_cpu_up(void)