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From: "Edgecombe, Rick P" <rick.p.edgecombe@intel.com>
To: "Hansen, Dave" <dave.hansen@intel.com>,
	"Lange, Jon" <jlange@microsoft.com>,
	"andrew.cooper3@citrix.com" <andrew.cooper3@citrix.com>
Cc: "seanjc@google.com" <seanjc@google.com>,
	"mark.rutland@arm.com" <mark.rutland@arm.com>,
	"john.starks@microsoft.com" <john.starks@microsoft.com>,
	"Williams, Dan J" <dan.j.williams@intel.com>,
	"will@kernel.org" <will@kernel.org>,
	"pbonzini@redhat.com" <pbonzini@redhat.com>,
	"linux-coco@lists.linux.dev" <linux-coco@lists.linux.dev>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"kirill.shutemov@linux.intel.com"
	<kirill.shutemov@linux.intel.com>
Subject: Re: "Paravisor" Feature Enumeration
Date: Tue, 6 Jan 2026 19:17:21 +0000	[thread overview]
Message-ID: <4ed7bbb991de771e68d435ff5aca929f20616295.camel@intel.com> (raw)
In-Reply-To: <4f3e1701-3ccd-4ee8-a45e-3872d71ef548@citrix.com>

On Tue, 2026-01-06 at 01:44 +0000, Andrew Cooper wrote:
> I agree that it seems like "just" an enumeration problem, but despite
> attending the presentation and rereading the slides, I'm still not clear
> on the precise scope.
> 
> Are we saying that, inside an opaque blob that a customer provides to a
> CSP to run we might have:
> 
> * a paravisor and an unaware OS, or
> * svsm and a fully-aware OS, or
> * something in-between these two.
> 
> and we're looking a way to describe which piece of the interior stack
> owns which capability/service?
> 
> If so, it can't come in from the outside; given that it's the capability
> enumeration, there's a chicken/egg problem with verifying the integrity.
> 
> It seems like it needs to be produced by whatever the first code to run
> is, after gathering capabilities in a vendor-specific way, and deciding
> which services it wants to provide, and which to delegate.
> 
> And if so, then it definitely cannot be in CPUID because that needs to
> be fixed from prior to the guest starting to run, and doesn't express
> dynamic properties of the system[*]

For TDX, the guest has some control of the CPUID bits. Both via #VE
interception, and poking at the TDX module guest side interfaces to change which
CPUID leafs generate a #VE.

This is indeed a complication for "the outside". It handles some MSRs accesses
that depend on the CPUID config which it doesn't have final visibility into.

I would like to see less of that in the future. But marking off a certain range
of leafs to be handled by the paravisor/SVSM and that KVM/outside just ignores
seems better than current situation we already have at least. Not to dismiss the
other points.

      parent reply	other threads:[~2026-01-06 19:17 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-05 21:42 "Paravisor" Feature Enumeration Dave Hansen
2026-01-06  0:01 ` dan.j.williams
2026-01-06  0:10   ` [EXTERNAL] " Jon Lange
2026-01-06  0:46     ` Dave Hansen
2026-01-06  0:36   ` Dave Hansen
2026-01-06  1:08     ` Sean Christopherson
2026-01-06  3:24     ` dan.j.williams
2026-01-06  1:44 ` Andrew Cooper
2026-01-06  2:12   ` [EXTERNAL] " Jon Lange
2026-01-06 22:39     ` Andrew Cooper
2026-01-06 23:01       ` Jon Lange
2026-01-07  1:58         ` dan.j.williams
2026-01-07  2:48           ` Jon Lange
2026-01-07 18:42             ` dan.j.williams
2026-01-08  6:53               ` Jon Lange
2026-01-07 12:06       ` Kiryl Shutsemau
2026-01-06 19:17   ` Edgecombe, Rick P [this message]

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