From: <dan.j.williams@intel.com>
To: Alexey Kardashevskiy <aik@amd.com>, <dan.j.williams@intel.com>,
<linux-coco@lists.linux.dev>, <linux-pci@vger.kernel.org>
Cc: <yilun.xu@linux.intel.com>, <aneesh.kumar@kernel.org>,
<gregkh@linuxfoundation.org>, Bjorn Helgaas <bhelgaas@google.com>,
"Lukas Wunner" <lukas@wunner.de>,
Samuel Ortiz <sameo@rivosinc.com>
Subject: Re: [PATCH v5 07/10] PCI/IDE: Add IDE establishment helpers
Date: Thu, 16 Oct 2025 21:40:58 -0700 [thread overview]
Message-ID: <68f1c8daae384_2a201001e@dwillia2-mobl4.notmuch> (raw)
In-Reply-To: <3d100559-8eb8-46cb-94b3-34ca9fb6dd96@amd.com>
Alexey Kardashevskiy wrote:
[..]
> > + /*
> > + * Now that in use ids are known, grab and assign a free id for idle
> > + * streams to remove ambiguity of which key slot is being activated by a
> > + * K_SET_GO event (PCIe r7.0 section 6.33.3 IDE Key Management (IDE_KM))
> > + */
> > + reserved_id = find_first_zero_bit(pdev->ide_stream_map, U8_MAX);
>
>
> pci_ide_init() is called when PCI is probing and at that point no
> stream is enabled so reserved_id ends up as 0.
>
> Since my platform only wants 1 stream, should I have called
> pci_ide_init_nr_streams() with "2", not "1"?
Hmm, no I would expect that number only needs to reflect the assignable
id maps.
> pci_ide_stream_alloc() fails to find a stream - fails in:
>
> struct stream_index *ep_stream __free(free_stream) = alloc_stream_index(
> pdev->ide_stream_map, pdev->nr_sel_ide, &__stream[PCI_IDE_EP]);
>
> as nr_sel_ide==1 (my EP has just one stream). If I go with
> reserved_id==0 and set ide->stream_id=1 in the PSP TSM driver, then
> streamindex#1 gets programmed (which is beyond the end of IDE cap)
> with streamid=0. As if reserved_id is actually reserved_index but the
> device wants me to reserve an ID.
The intent was ID reservation, not index. Will take a look, but first...
> We could simplify it by assigning something like "255" to all
> unused+disabled streams. Thanks,
I thought we were still waiting to to determine if this behavior is a
quirk of a test device, or something that Linux is going to see in
production?
Yes, I want the reserved id to start at 255 (unless BIOS already stole
that id).
In any event I will send out v7 without this, but include it in an
incremental update along with the address association support from
Yilun.
next prev parent reply other threads:[~2025-10-17 4:41 UTC|newest]
Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-27 3:51 [PATCH v5 00/10] PCI/TSM: Core infrastructure for PCI device security (TDISP) Dan Williams
2025-08-27 3:51 ` [PATCH v5 01/10] coco/tsm: Introduce a core device for TEE Security Managers Dan Williams
2025-08-27 3:51 ` [PATCH v5 02/10] PCI/IDE: Enumerate Selective Stream IDE capabilities Dan Williams
2025-09-15 16:18 ` Jonathan Cameron
2025-09-19 23:32 ` dan.j.williams
2025-08-27 3:51 ` [PATCH v5 03/10] PCI: Introduce pci_walk_bus_reverse(), for_each_pci_dev_reverse() Dan Williams
2025-08-27 3:51 ` [PATCH v5 04/10] PCI/TSM: Authenticate devices via platform TSM Dan Williams
2025-08-27 13:25 ` Alexey Kardashevskiy
2025-08-29 1:06 ` dan.j.williams
2025-08-29 1:58 ` Alexey Kardashevskiy
2025-09-05 0:50 ` dan.j.williams
2025-09-05 3:34 ` Alexey Kardashevskiy
2025-09-06 2:07 ` dan.j.williams
2025-09-08 6:13 ` Alexey Kardashevskiy
2025-09-09 0:41 ` dan.j.williams
2025-09-09 1:35 ` Alexey Kardashevskiy
2025-09-09 1:52 ` dan.j.williams
2025-09-10 10:55 ` Alexey Kardashevskiy
2025-09-10 15:45 ` dan.j.williams
2025-08-28 11:43 ` Alexey Kardashevskiy
2025-08-29 1:23 ` dan.j.williams
2025-08-30 13:26 ` Alexey Kardashevskiy
2025-09-05 0:51 ` dan.j.williams
2025-09-02 15:08 ` Aneesh Kumar K.V
2025-09-03 2:03 ` Alexey Kardashevskiy
2025-09-05 20:06 ` dan.j.williams
2025-09-05 19:13 ` dan.j.williams
2025-09-02 15:13 ` Aneesh Kumar K.V
2025-09-03 2:07 ` Alexey Kardashevskiy
2025-09-05 20:13 ` dan.j.williams
2025-09-08 11:19 ` Alexey Kardashevskiy
2025-09-05 20:03 ` dan.j.williams
2025-09-03 2:17 ` Alexey Kardashevskiy
2025-09-05 20:35 ` dan.j.williams
2025-08-27 3:51 ` [PATCH v5 05/10] samples/devsec: Introduce a PCI device-security bus + endpoint sample Dan Williams
2025-08-27 3:51 ` [PATCH v5 06/10] PCI: Add PCIe Device 3 Extended Capability enumeration Dan Williams
2025-08-27 3:51 ` [PATCH v5 07/10] PCI/IDE: Add IDE establishment helpers Dan Williams
2025-09-02 1:29 ` Alexey Kardashevskiy
2025-09-02 1:54 ` Alexey Kardashevskiy
2025-09-05 1:40 ` dan.j.williams
2025-09-05 2:14 ` Alexey Kardashevskiy
2025-09-06 2:00 ` dan.j.williams
2025-09-08 6:25 ` Alexey Kardashevskiy
2025-09-09 0:42 ` dan.j.williams
2025-09-15 11:46 ` Alexey Kardashevskiy
2025-10-17 4:06 ` Alexey Kardashevskiy
2025-10-17 4:40 ` dan.j.williams [this message]
2025-10-17 11:15 ` Alexey Kardashevskiy
2025-09-05 1:27 ` dan.j.williams
2025-09-05 2:23 ` Alexey Kardashevskiy
2025-10-17 11:31 ` Alexey Kardashevskiy
2025-10-17 19:18 ` dan.j.williams
2025-10-28 23:00 ` dan.j.williams
2025-10-29 8:04 ` Alexey Kardashevskiy
2025-08-27 3:51 ` [PATCH v5 08/10] PCI/IDE: Report available IDE streams Dan Williams
2025-08-27 3:51 ` [PATCH v5 09/10] PCI/TSM: Report active " Dan Williams
2025-08-27 3:51 ` [PATCH v5 10/10] samples/devsec: Add sample IDE establishment Dan Williams
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