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Wed, 4 Mar 2026 17:14:59 +0000 From: Date: Wed, 4 Mar 2026 09:14:57 -0800 To: Dan Williams , , CC: , , , , , , , , Arnd Bergmann Message-ID: <69a86891458b8_6423c1009f@dwillia2-mobl4.notmuch> In-Reply-To: <20260303000207.1836586-10-dan.j.williams@intel.com> References: <20260303000207.1836586-1-dan.j.williams@intel.com> <20260303000207.1836586-10-dan.j.williams@intel.com> Subject: Re: [PATCH v2 09/19] PCI/TSM: Support creating encrypted MMIO descriptors via TDISP Report Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: SJ0PR03CA0050.namprd03.prod.outlook.com (2603:10b6:a03:33e::25) To PH8PR11MB8107.namprd11.prod.outlook.com (2603:10b6:510:256::6) Precedence: bulk X-Mailing-List: linux-coco@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PH8PR11MB8107:EE_|SJ0PR11MB5118:EE_ X-MS-Office365-Filtering-Correlation-Id: 27d6248f-76cd-48ca-4a9c-08de7a11905b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|366016|7416014|376014; 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With those descriptors the TSM driver can use pci_tsm_mmio_setup() to > inform ioremap() how to map the device per the device's expectations. The > VM is expected to validate the interface with the relying party before > accepting the device for operation. > > The helper also provides the obfuscated starting address for each > encrypted MMIO range as the VM is never disclosed on the hpa that > correlates to the gpa of the device's mmio. The obfuscated address is BAR > relative. > > Based on an original patch by Aneesh [1] > > Cc: Arnd Bergmann > Link: https://lore.kernel.org/linux-coco/20251117140007.122062-8-aneesh.kumar@kernel.org/ > Co-developed-by: Xu Yilun > Signed-off-by: Xu Yilun > Signed-off-by: Dan Williams [..] > +/** > + * pci_tsm_mmio_alloc() - allocate encrypted MMIO range descriptor > + * @pdev: device owner of MMIO ranges > + * @report_data: TDISP Device Interface (DevIf) Report blob > + * @report_sz: DevIf Report size > + * > + * Return: the encrypted MMIO range descriptor on success, NULL on failure > + * > + * Assumes that this is called within the live lifetime of a PCI device's > + * association with a low level TSM. > + */ > +struct pci_tsm_mmio *pci_tsm_mmio_alloc(struct pci_dev *pdev) > +{ > + struct pci_tsm *tsm = pdev->tsm; > + struct pci_tsm_evidence *evidence = &tsm->evidence; > + struct pci_tsm_evidence_object *report_obj = &evidence->obj[PCI_TSM_EVIDENCE_TYPE_REPORT]; > + struct tsm_dev *tsm_dev = tsm->tsm_dev; > + u64 reporting_bar_base, last_reporting_end; > + const struct pci_tsm_devif_report *report; > + u32 mmio_range_count; > + int last_bar = -1; > + int i; > + > + guard(rwsem_read)(&evidence->lock); > + if (report_obj->len < sizeof(struct pci_tsm_devif_report)) > + return NULL; > + > + if (dev_WARN_ONCE(&tsm_dev->dev, !IS_ALIGNED((unsigned long) report_obj->data, 8), > + "misaligned report data\n")) > + return NULL; Is this going to cause any implementation to need to copy the buffer received from the low-level TSM? If so I would just mark 'struct pci_tsm_devif_report' and 'struct pci_tsm_mmio_entry' as __packed and drop this check. > + > + report = report_obj->data; > + mmio_range_count = __le32_to_cpu(report->mmio_range_count); > + > + /* check that the report object is self-consistent on mmio entries */ > + if (report_obj->len < struct_size(report, mmio, mmio_range_count)) > + return NULL; > + > + /* create pci_tsm_mmio descriptors from the report data */ > + struct pci_tsm_mmio *mmio __free(kfree) = > + kzalloc(struct_size(mmio, mmio, mmio_range_count), GFP_KERNEL); > + if (!mmio) > + return NULL; > + > + for (i = 0; i < mmio_range_count; i++) { > + u64 range_off; > + struct range range; > + const struct pci_tsm_devif_mmio *mmio_data = &report->mmio[i]; > + struct pci_tsm_mmio_entry *entry = > + pci_tsm_mmio_entry(mmio, mmio->nr); > + /* report values in are in terms of 4K pages */ > + u64 tsm_offset = __le64_to_cpu(mmio_data->pfn) * SZ_4K; > + u64 size = __le32_to_cpu(mmio_data->nr_pfns) * SZ_4K; > + u32 attr = __le32_to_cpu(mmio_data->attributes); > + int bar = FIELD_GET(PCI_TSM_DEVIF_REPORT_MMIO_ATTR_RANGE_ID, > + attr); > + > + tsm_offset *= SZ_4K; > + size *= SZ_4K; Whoops, these pfn to absolute address conversions were already performed above, will fix.