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dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=amd.com; Received: from SA1PR12MB999228.namprd12.prod.outlook.com (2603:10b6:806:4db::10) by DS5PPF18A985A10.namprd12.prod.outlook.com (2603:10b6:f:fc00::645) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.615.8; Wed, 11 Nov 2026 09:03:55 +0000 Received: from SA1PR12MB999228.namprd12.prod.outlook.com ([fe80::4dba:119e:8e7c:37b3]) by SA1PR12MB999228.namprd12.prod.outlook.com ([fe80::4dba:119e:8e7c:37b3%6]) with mapi id 15.21.0615.007; Wed, 11 Nov 2026 09:03:55 +0000 Message-ID: <7ddf5f6d-0eca-4eda-9240-3903a7cd86eb@amd.com> Date: Wed, 11 Nov 2026 20:03:46 +1100 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH v1 10/11] virt: coco: arm-cca-host: Publish slot zero and establish streams after acceptance To: Jason Gunthorpe Cc: Dave Jiang , "Reshetova, Elena" , Xu Yilun , "Aneesh Kumar K.V" , "linux-coco@lists.linux.dev" , Jiri Pirko , "Tian, Kevin" , Catalin Marinas , Suzuki K Poulose , Steven Price , Kiryl Shutsemau , "Edgecombe, Rick P" , Dave Hansen , Jonathan Cameron , Bjorn Helgaas , Ashish Kalra , Tom Lendacky , John Allen , Will Deacon , Mark Rutland , "patches@lists.linux.dev" References: <20261104134119.GR274202@nvidia.com> <20261106193018.GK770409@nvidia.com> <53bc57bf-1ee1-407a-b48b-bc6b2deee12a@intel.com> <20261108183337.GL770409@nvidia.com> <2b89b830-f1e4-4304-93ee-40287a4b5b2d@intel.com> <20261109185315.GS770409@nvidia.com> <9cdaa99e-4a1a-4fa4-8fe7-73b9bf48ecd9@amd.com> <20261110125202.GD738765@nvidia.com> From: Alexey Kardashevskiy Content-Language: en-US In-Reply-To: <20261110125202.GD738765@nvidia.com> Content-Type: text/plain; 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Such a big spec mistake. >> >> Out of curiosity - why that many? There is only a handful of SPDM >> messages and secure SPDM has the size in the header. > > It sounds like there are alot of options. Since nothing is sized in > the message you have to parse the negotiated algorithms and spec > version to figure out how big each crypto field is and manually sum > everything up. > > IDK I thought it was alot too, but it is just an estimate. > >>> 1) I think this removes alot of code from the TSM drivers. All this >>> stuff they have to go back and get the data after the fact, or the >>> thing that is almost like this in RMM, goes away. The TSM drivers >>> are very slim, just run their communicate loops. >> >> It is already like this pretty much, is not it? Well, on AMD. > > Not quite, AMD doesn't have any way to return the session transcript > to userspace, and it hides VCA under it's get measurements thing. It > only looks simple because these issues haven't been addressed. > > In terms of presenting a consistent uAPI for SPDM AMD is the furthest > away from the rest and probably the best reason to do this design > since it would bring it into alignment. > >>> 2) Clear uniform path to 1.3, stop after GET_DIGESTS, let userspace >>> inspect the certificates, continue with the slot. Again drivers can >>> be super simple, just need to pause at the right point in the >>> sequence. >> >> >> The AMD PSP calls SPDM_DIGESTS first, then SPDM_CERTIFICATE (just >> like the PCIe spec depicts). May be stop at SPDM_KEY_EXCHANGE_RSP? > > That's wasteful too, GET_DIGESTS before KEY_EXCHANGE isn't signed so > it can't really be used for anything. The attacker could steer the slot selection to less optimal, is that the attack? The TSM has to pick a slot to sign GET_DIGESTS which we then want to use to pick a better slot and switch to that? > This is also after the OS has > told PSP what the slot is, so it can't even help do slot selection. How is pausing going to help with the slot selection? >>> 3) The data collected and presented to userspace is perfectly uniform >>> governed only by the SPDM specification. There is a clear path to >>> adopt newer versions in the kernel with in-kernel SPDM that >>> instantly with nearly no-code works with all the TSM drivers. >>> 4) This is about half of in-kernel SPDM, the receive buffer >>> reassembly, certificate chain reassembly, x509, padding stripping. >>> Each a complicated topic on its own. We always imagined having >>> in-kernel SPDM, so I view this as effectively free code - contigent >>> on organizing the in-kernel SPDM implementation in a properly >>> modular way. >>> 5) Without AI this looks actually fairly scary. I can see why people >>> wanted to avoid it with different schemes to have the TSM do some >>> of the work. Yet we planned to do it anyhow for in-kernel SPDM so.. >>> 6) With AI this is probably a weeks work I suppose to really expertly >>> polish and make excellent tests. >>> 7) There is clear overlap with Alistair's work, I don't have a sense >>> right now how close some of the parts in that series are to fitting >>> this shape. >> >> You want the above just to prevent IDE keys from being programmed >> into the device before accepting the device in the host os, or there >> is more to it? > > I want a consistent uAPI that is 100% the same for all four > implementations. I do not want ARM to show the VCA before measurements > in a transcript and AMD to hide the VCA in an AMD specific measurement > blob - for example. > > I want a uAPI where the user cannot tell the difference between the > four backends. When they operate the same PCIe device they all give > exactly the same uAPI experiance. That's great, cannot agree more, but what was that recurring thing about not programming IDE keys before accepting the PF? Thanks, > > Jason -- Alexey