From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 503107F for ; Tue, 2 Aug 2022 23:46:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1659483999; x=1691019999; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=6rXGmJONj6b+nIwOClpJuGcxiMNJkmRdeSvTUzrRYKw=; b=ewQmNbUhWJEhDFRchni37SDkuFJYWwsO549xArF+m0avudCnxywe/ej6 wO1oivLgr+mEPgwMMF6r5LakoxYArgLJfDYQg1hR7JfbK5gADVw/27t1X 6o5LtJhoHsH2AZOewI0V2dVZxIoDjJFLif8ehE3AIweiMfY1lbxswj41w aWAyK9nifE0bnl4YlPiwlc95z2Cz/i4T7nXuxzrPsLPmE0ke5xJAzlimj fIj1KEozGPklLWa0JBWcwXXc1wln5pQP7cG54n1kb/d2Vt2F8WYrz3Sfd 48kIbt9+L2QtRAWmnaOjpQUm3LPN6oAfkeloEVYYzoHmOJVkjvAB261oB Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10427"; a="272591650" X-IronPort-AV: E=Sophos;i="5.93,212,1654585200"; d="scan'208";a="272591650" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Aug 2022 16:46:38 -0700 X-IronPort-AV: E=Sophos;i="5.93,212,1654585200"; d="scan'208";a="630919269" Received: from ywagle-mobl.amr.corp.intel.com (HELO [10.209.29.213]) ([10.209.29.213]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Aug 2022 16:46:38 -0700 Message-ID: <80cc204b-a24f-684f-ec66-1361b69cae39@intel.com> Date: Tue, 2 Aug 2022 16:46:38 -0700 Precedence: bulk X-Mailing-List: linux-coco@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0 Subject: Re: [PATCHv7 10/14] x86/mm: Avoid load_unaligned_zeropad() stepping into unaccepted memory Content-Language: en-US To: Borislav Petkov , "Kirill A. Shutemov" Cc: Andy Lutomirski , Sean Christopherson , Andrew Morton , Joerg Roedel , Ard Biesheuvel , Andi Kleen , Kuppuswamy Sathyanarayanan , David Rientjes , Vlastimil Babka , Tom Lendacky , Thomas Gleixner , Peter Zijlstra , Paolo Bonzini , Ingo Molnar , Varad Gautam , Dario Faggioli , Mike Rapoport , David Hildenbrand , marcelo.cerri@canonical.com, tim.gardner@canonical.com, khalid.elmously@canonical.com, philip.cox@canonical.com, x86@kernel.org, linux-mm@kvack.org, linux-coco@lists.linux.dev, linux-efi@vger.kernel.org, linux-kernel@vger.kernel.org References: <20220614120231.48165-1-kirill.shutemov@linux.intel.com> <20220614120231.48165-11-kirill.shutemov@linux.intel.com> From: Dave Hansen In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 7/26/22 03:21, Borislav Petkov wrote: > On Tue, Jun 14, 2022 at 03:02:27PM +0300, Kirill A. Shutemov wrote: >> But, this approach does not work for unaccepted memory. For TDX, a load >> from unaccepted memory will not lead to a recoverable exception within >> the guest. The guest will exit to the VMM where the only recourse is to >> terminate the guest. > FTR, this random-memory-access-to-unaccepted-memory-is-deadly thing is > really silly. We should be able to handle such cases - because they do > happen often - in a more resilient way. Just look at the complex dance > this patch needs to do just to avoid this. > > IOW, this part of the coco technology needs improvement. This particular wound is self-inflicted. The hardware can *today* generate a #VE for these accesses. But, to make writing the #VE code more straightforward, we asked that the hardware not even bother delivering the exception. At the time, nobody could come up with a case why there would ever be a legitimate, non-buggy access to unaccepted memory. We learned about load_unaligned_zeropad() the hard way. I never ran into it and never knew it was there. Dangit. We _could_ go back to the way it was originally. We could add load_unaligned_zeropad() support to the #VE handler, and there's little risk of load_unaligned_zeropad() itself being used in the interrupts-disabled window early in the #VE handler. That would get rid of all the nasty adjacent page handling in the unaccepted memory code. But, that would mean that we can land in the #VE handler from more contexts. Any normal, non-buggy use of load_unaligned_zeropad() can end up there, obviously. We would, for instance, need to be more careful about #VE recursion. We'd also have to make sure that _bugs_ that land in the #VE handler can still be handled in a sane way. To sum it all up, I'm not happy with the complexity of the page acceptance code either but I'm not sure that it's bad tradeoff compared to greater #VE complexity or fragility. Does anyone think we should go back and really reconsider this?