From: Marc Zyngier <maz@kernel.org>
To: "Aneesh Kumar K.V (Arm)" <aneesh.kumar@kernel.org>
Cc: linux-coco@lists.linux.dev,
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Subject: Re: [PATCH v9 14/14] irqchip/gic-v3-its: Preallocate VPE L1 tables
Date: Thu, 05 Nov 2026 16:20:01 +0000 [thread overview]
Message-ID: <86zevn1c9a.wl-maz@kernel.org> (raw)
In-Reply-To: <20261104164555.3555725-15-aneesh.kumar@kernel.org>
On Wed, 04 Nov 2026 16:45:55 +0000,
"Aneesh Kumar K.V (Arm)" <aneesh.kumar@kernel.org> wrote:
>
> VPE L1 tables are allocated from the CPU-starting callback, where sleeping is
> not allowed. Remove the page allocation from this atomic path.
>
> Use a blocking allocation for the boot CPU and record the resulting table
> order. Allocate a page of that order from the sleepable CPU hotplug prepare
> stage for each secondary CPU. Consume the preallocated page only when the CPU
> cannot inherit an existing redistributor or ITS table.
>
> Reclaim unused preallocations after the CPU reaches the online state, and from
> the prepare-state teardown when CPU bring-up aborts.
No. The way to do it is to move the ITS probing out of the
non-sleepable CPU hotplug path.
I proposed a potential hack at [1] (which I find far more palatable
than this proposal), but the real fix is to probe the ITSs as
devices. Putting even more ugly hacks on top of the existing PoS
driver is definitely not an acceptable outcome.
M.
[1] https://lore.kernel.org/all/86tswrkrh4.wl-maz@kernel.org/
--
Without deviation from the norm, progress is not possible.
prev parent reply other threads:[~2026-11-05 16:20 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-04 16:45 [PATCH v9 00/14] coco: guest: Add a shared-granule allocator for host-shared memory Aneesh Kumar K.V (Arm)
2026-11-04 16:45 ` [PATCH v9 01/14] mm: Add an allocator for CoCo shared memory Aneesh Kumar K.V (Arm)
2026-11-04 16:45 ` [PATCH v9 02/14] mm: Zero memory during shared memory transitions Aneesh Kumar K.V (Arm)
2026-11-04 16:45 ` [PATCH v9 03/14] irqchip/gic-v3-its: Resolve the default NUMA node explicitly Aneesh Kumar K.V (Arm)
2026-11-04 16:45 ` [PATCH v9 04/14] irqchip/gic-v3-its: Allocate shared tables using CoCo shared memory allocator Aneesh Kumar K.V (Arm)
2026-11-04 16:45 ` [PATCH v9 05/14] dma-contiguous: Derive shared alignment from DMA attributes Aneesh Kumar K.V (Arm)
2026-11-04 16:45 ` [PATCH v9 06/14] dma-pool: Allocate CoCo atomic pools using CoCo shared memory allocator Aneesh Kumar K.V (Arm)
2026-11-04 16:45 ` [PATCH v9 07/14] dma-direct: Align CoCo shared DMA allocations to the shared granule size Aneesh Kumar K.V (Arm)
2026-11-04 16:45 ` [PATCH v9 08/14] swiotlb: Align shared IO TLB pools " Aneesh Kumar K.V (Arm)
2026-11-04 16:45 ` [PATCH v9 09/14] swiotlb: Reject misaligned restricted DMA pools for CoCo guests Aneesh Kumar K.V (Arm)
2026-11-04 16:45 ` [PATCH v9 10/14] dma-buf: system_heap: Limit scatterlist entries to the buffer size Aneesh Kumar K.V (Arm)
2026-11-04 16:45 ` [PATCH v9 11/14] dma-buf: system_heap: Allocate shared buffers using CoCo shared memory allocator Aneesh Kumar K.V (Arm)
2026-11-04 16:45 ` [PATCH v9 12/14] swiotlb: Make rounded shared pool capacity allocatable Aneesh Kumar K.V (Arm)
2026-11-04 16:45 ` [PATCH v9 13/14] mm: Assert CoCo shared allocations may sleep Aneesh Kumar K.V (Arm)
2026-11-04 16:45 ` [PATCH v9 14/14] irqchip/gic-v3-its: Preallocate VPE L1 tables Aneesh Kumar K.V (Arm)
2026-11-05 16:20 ` Marc Zyngier [this message]
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