From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail.skyhub.de (mail.skyhub.de [5.9.137.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DFCF263B for ; Mon, 25 Jul 2022 12:23:29 +0000 (UTC) Received: from zn.tnic (p200300ea972976f8329c23fffea6a903.dip0.t-ipconnect.de [IPv6:2003:ea:9729:76f8:329c:23ff:fea6:a903]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.skyhub.de (SuperMail on ZX Spectrum 128k) with ESMTPSA id EE7341EC0646; Mon, 25 Jul 2022 14:23:23 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alien8.de; s=dkim; t=1658751804; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:in-reply-to:in-reply-to: references:references; bh=Sn5hmQQVaS9IivV+qbBQot02DE7Tn3rjLFedQjB87Z8=; b=YSaLt6rMmx//TZ9X4tE5W2zr6O5WXLi/77suixSs0FK1W3MtTiHr4HGB++dUuUruuskSyE hguBTrv+vOf/SXueqGd6fzgOc9nzLCrUwg5m5drkiVP6EgsqV6kYJL3nE0hUWrrOlHMpRG yOpRsGwmx+YWM5mWRadfubTwOQ2IdZs= Date: Mon, 25 Jul 2022 14:23:20 +0200 From: Borislav Petkov To: Dave Hansen Cc: "Kirill A. Shutemov" , Andy Lutomirski , Sean Christopherson , Andrew Morton , Joerg Roedel , Ard Biesheuvel , Andi Kleen , Kuppuswamy Sathyanarayanan , David Rientjes , Vlastimil Babka , Tom Lendacky , Thomas Gleixner , Peter Zijlstra , Paolo Bonzini , Ingo Molnar , Varad Gautam , Dario Faggioli , Mike Rapoport , David Hildenbrand , marcelo.cerri@canonical.com, tim.gardner@canonical.com, khalid.elmously@canonical.com, philip.cox@canonical.com, x86@kernel.org, linux-mm@kvack.org, linux-coco@lists.linux.dev, linux-efi@vger.kernel.org, linux-kernel@vger.kernel.org, Mike Rapoport Subject: Re: [PATCHv7 02/14] mm: Add support for unaccepted memory Message-ID: References: <20220614120231.48165-1-kirill.shutemov@linux.intel.com> <20220614120231.48165-3-kirill.shutemov@linux.intel.com> <707ca113-c2a2-8fe2-a22c-5be13adc7bb4@intel.com> Precedence: bulk X-Mailing-List: linux-coco@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <707ca113-c2a2-8fe2-a22c-5be13adc7bb4@intel.com> On Fri, Jul 22, 2022 at 12:30:36PM -0700, Dave Hansen wrote: > Sure does... *Something* has to manage the cache coherency so that old > physical aliases of the converted memory don't write back and clobber > new data. But, maybe the hardware is doing that now. Let's hope. > Yeah, that two-tier system is the way it's happening today from what > I understand. This whole conversation is about how to handle the >4GB > memory. Would it be possible to pre-accept a bunch of mem - think "pre-fault" - from userspace? I.e., I'm thinking some huge process is going to start in the VM, VM userspace goes and causes a chunk of memory to be pre-accepted and then the process starts and runs more-or-less smoothly as the majority of its memory has already been "prepared". Or does that not make any sense from mm perspective? -- Regards/Gruss, Boris. https://people.kernel.org/tglx/notes-about-netiquette