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AJvYcCUtW6jkz5r8V2jQu0PIjV9ZKv3g5c4v7Vc7gg4ajVH7dbNHfoNmCUSUtOB9pN4NqJ0FoeQCevPI1ESLt+baBiLITvydAmfBKAwcRA== X-Gm-Message-State: AOJu0YzRUGOPmYrPHvHYewYg5F5BlsMtv1yPfRA//eGk1lt0LTFefKns hykIGTX9GSL8DYEDBcPdPQUQvtqU6eJO2w0rzlvVrg4hr14Eyg0meT2kDs90q9LYUyTzVcMACgN VgQ== X-Google-Smtp-Source: AGHT+IEX/OuQG0ZhfJrRj7k8BAEO/RM7nxjVnIQb2HXfQAss9M//0E1w+F9Y0UfoI1zSWZuVX2x+Zkq5Z94= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:5c37]) (user=seanjc job=sendgmr) by 2002:a05:6902:1006:b0:dc6:c94e:fb85 with SMTP id 3f1490d57ef6-dee4f1b1019mr242036276.2.1715356750717; Fri, 10 May 2024 08:59:10 -0700 (PDT) Date: Fri, 10 May 2024 08:59:09 -0700 In-Reply-To: <20240510152744.ejdy4jqawc2zd2dt@amd.com> Precedence: bulk X-Mailing-List: linux-coco@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20240501085210.2213060-1-michael.roth@amd.com> <20240510015822.503071-1-michael.roth@amd.com> <20240510152744.ejdy4jqawc2zd2dt@amd.com> Message-ID: Subject: Re: [PATCH v15 21/23] KVM: MMU: Disable fast path for private memslots From: Sean Christopherson To: Michael Roth Cc: Paolo Bonzini , kvm@vger.kernel.org, linux-coco@lists.linux.dev, linux-mm@kvack.org, linux-crypto@vger.kernel.org, x86@kernel.org, linux-kernel@vger.kernel.org, tglx@linutronix.de, mingo@redhat.com, jroedel@suse.de, thomas.lendacky@amd.com, hpa@zytor.com, ardb@kernel.org, vkuznets@redhat.com, jmattson@google.com, luto@kernel.org, dave.hansen@linux.intel.com, slp@redhat.com, pgonda@google.com, peterz@infradead.org, srinivas.pandruvada@linux.intel.com, rientjes@google.com, dovmurik@linux.ibm.com, tobin@ibm.com, bp@alien8.de, vbabka@suse.cz, kirill@shutemov.name, ak@linux.intel.com, tony.luck@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com, alpergun@google.com, jarkko@kernel.org, ashish.kalra@amd.com, nikunj.dadhania@amd.com, pankaj.gupta@amd.com, liam.merwick@oracle.com, papaluri@amd.com, Isaku Yamahata Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable On Fri, May 10, 2024, Michael Roth wrote: > On Fri, May 10, 2024 at 03:50:26PM +0200, Paolo Bonzini wrote: > > On Fri, May 10, 2024 at 3:47=E2=80=AFPM Sean Christopherson wrote: > > > > > > > + * Since software-protected VMs don't have a notion of a shar= ed vs. > > > > + * private that's separate from what KVM is tracking, the abo= ve > > > > + * KVM_EXIT_MEMORY_FAULT condition wouldn't occur, so avoid t= he > > > > + * special handling for that case for now. > > > > > > Very technically, it can occur if userspace _just_ modified the attri= butes. And > > > as I've said multiple times, at least for now, I want to avoid specia= l casing > > > SW-protected VMs unless it is *absolutely* necessary, because their s= ole purpose > > > is to allow testing flows that are impossible to excercise without SN= P/TDX hardware. > >=20 > > Yep, it is not like they have to be optimized. >=20 > Ok, I thought there were maybe some future plans to use sw-protected VMs > to get some added protections from userspace. But even then there'd > probably still be extra considerations for how to handle access tracking > so white-listing them probably isn't right anyway. >=20 > I was also partly tempted to take this route because it would cover this > TDX patch as well: >=20 > https://lore.kernel.org/lkml/91c797997b57056224571e22362321a23947172f.1= 705965635.git.isaku.yamahata@intel.com/ Hmm, I'm pretty sure that patch is trying to fix the exact same issue you a= re fixing, just in a less precise way. S-EPT entries only support RWX=3D0 and= RWX=3D111b, i.e. it should be impossible to have a write-fault to a present S-EPT entry= . And if TDX is running afoul of this code: if (!fault->present) return !kvm_ad_enabled(); then KVM should do the sane thing and require A/D support be enabled for TD= X. And if it's something else entirely, that changelog has some explaining to = do. > and avoid any weirdness about checking kvm_mem_is_private() without > checking mmu_invalidate_seq, but I think those cases all end up > resolving themselves eventually and added some comments around that. Yep, checking state that is protected by mmu_invalidate_seq outside of mmu_= lock is definitely allowed, e.g. the entire fast page fault path operates outsid= e of mmu_lock and thus outside of mmu_invalidate_seq's purview. It's a-ok because the SPTE are done with an atomic CMPXCHG, and so KVM only= needs to ensure its page tables aren't outright _freed_. If the zap triggered by= the attributes change "wins", then the fast #PF path will fail the CMPXCHG and = be an expensive NOP. If the fast #PF wins, the zap will pave over the fast #PF f= ix, and the IPI+flush that is needed for all zaps, to ensure vCPUs don't have s= tale references, does the rest. And if there's an attributes race that causes the fast #PF to bail early, t= he vCPU will see the correct state on the next page fault.