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X-CSE-ConnectionGUID: UuUpmqMtTGuc/yO3gvhohQ== X-CSE-MsgGUID: +uEN1j/ZRLKJIv5YhZzP8w== X-IronPort-AV: E=McAfee;i="6800,10657,11717"; a="73628799" X-IronPort-AV: E=Sophos;i="6.21,320,1763452800"; d="scan'208";a="73628799" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Mar 2026 14:56:59 -0800 X-CSE-ConnectionGUID: 78vV/02pSfWtK4swQNFAeg== X-CSE-MsgGUID: XE6gTTCCTHudlbxc9l33yQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,320,1763452800"; d="scan'208";a="217797010" Received: from cmdeoliv-mobl4.amr.corp.intel.com (HELO [10.125.108.103]) ([10.125.108.103]) by orviesa008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Mar 2026 14:56:58 -0800 Message-ID: Date: Mon, 2 Mar 2026 14:57:03 -0800 Precedence: bulk X-Mailing-List: linux-coco@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 3/7] x86/sev: add support for RMPOPT instruction To: Ashish Kalra , tglx@kernel.org, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, seanjc@google.com, peterz@infradead.org, thomas.lendacky@amd.com, herbert@gondor.apana.org.au, davem@davemloft.net, ardb@kernel.org Cc: pbonzini@redhat.com, aik@amd.com, Michael.Roth@amd.com, KPrateek.Nayak@amd.com, Tycho.Andersen@amd.com, Nathan.Fontenot@amd.com, jackyli@google.com, pgonda@google.com, rientjes@google.com, jacobhxu@google.com, xin@zytor.com, pawan.kumar.gupta@linux.intel.com, babu.moger@amd.com, dyoung@redhat.com, nikunj@amd.com, john.allen@amd.com, darwi@linutronix.de, linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, kvm@vger.kernel.org, linux-coco@lists.linux.dev References: <8dc0198f1261f5ae4b16388fc1ffad5ddb3895f9.1772486459.git.ashish.kalra@amd.com> From: Dave Hansen Content-Language: en-US Autocrypt: addr=dave.hansen@intel.com; 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charset=UTF-8 Content-Transfer-Encoding: 7bit That subject could use a wee bit of work. I'd probably talk about this adding a new kernel thread that does the optimizations asynchronously. On 3/2/26 13:36, Ashish Kalra wrote: > From: Ashish Kalra > > As SEV-SNP is enabled by default on boot when an RMP table is > allocated by BIOS, the hypervisor and non-SNP guests are subject to > RMP write checks to provide integrity of SNP guest memory. > > RMPOPT is a new instruction that minimizes the performance overhead of > RMP checks on the hypervisor and on non-SNP guests by allowing RMP > checks to be skipped for 1GB regions of memory that are known not to > contain any SEV-SNP guest memory. > > Enable RMPOPT optimizations globally for all system RAM at RMP > initialization time. RMP checks can initially be skipped for 1GB memory > ranges that do not contain SEV-SNP guest memory (excluding preassigned > pages such as the RMP table and firmware pages). As SNP guests are > launched, RMPUPDATE will disable the corresponding RMPOPT optimizations. This is heavy on the "what" and light on the "why" and "how". > diff --git a/arch/x86/virt/svm/sev.c b/arch/x86/virt/svm/sev.c > index 405199c2f563..c99270dfe3b3 100644 > --- a/arch/x86/virt/svm/sev.c > +++ b/arch/x86/virt/svm/sev.c > @@ -19,6 +19,7 @@ > #include > #include > #include > +#include > > #include > #include > @@ -122,6 +123,13 @@ static u64 rmp_cfg; > > static u64 probed_rmp_base, probed_rmp_size; > > +enum rmpopt_function { > + RMPOPT_FUNC_VERIFY_AND_REPORT_STATUS, > + RMPOPT_FUNC_REPORT_STATUS > +}; Shouldn't these go by the instruction definition? You could even call it rmpopt_rcx or something. > +static struct task_struct *rmpopt_task; > + > static LIST_HEAD(snp_leaked_pages_list); > static DEFINE_SPINLOCK(snp_leaked_pages_list_lock); > > @@ -500,6 +508,61 @@ static bool __init setup_rmptable(void) > } > } > > +/* > + * 'val' is a system physical address aligned to 1GB OR'ed with > + * a function selection. Currently supported functions are 0 > + * (verify and report status) and 1 (report status). > + */ > +static void rmpopt(void *val) > +{ > + asm volatile(".byte 0xf2, 0x0f, 0x01, 0xfc" > + : : "a" ((u64)val & PUD_MASK), "c" ((u64)val & 0x1) > + : "memory", "cc"); > +} Doesn't this belong in: arch/x86/include/asm/special_insns.h Also, it's not reporting *any* status here, right? So why even talk about it if the kernel isn't doing any status checks? It just makes it more confusing. > +static int rmpopt_kthread(void *__unused) > +{ > + phys_addr_t pa_start, pa_end; > + > + pa_start = ALIGN_DOWN(PFN_PHYS(min_low_pfn), PUD_SIZE); > + pa_end = ALIGN(PFN_PHYS(max_pfn), PUD_SIZE); Needs vertical alignment: pa_start = ALIGN_DOWN(PFN_PHYS(min_low_pfn), PUD_SIZE); pa_end = ALIGN( PFN_PHYS(max_pfn), PUD_SIZE); Nit: the architecture says "1GB" regions, not PUD_SIZE. If we ever got fancy and changed the page tables, this code would break. Why make it harder on ourselves than it has to be? > + /* Limit memory scanning to the first 2 TB of RAM */ > + pa_end = (pa_end - pa_start) <= SZ_2T ? pa_end : pa_start + SZ_2T; That's a rather unfortunate use of ternary form. Isn't this a billion times more clear? if (pa_end - pa_start > SZ_2T) pa_end = pa_start + SZ_2T; > + while (!kthread_should_stop()) { > + phys_addr_t pa; > + > + pr_info("RMP optimizations enabled on physical address range @1GB alignment [0x%016llx - 0x%016llx]\n", > + pa_start, pa_end); This isn't really enabling optimizations. It's trying to enable them, right? It might fall on its face and fail every time, right? > + /* > + * RMPOPT optimizations skip RMP checks at 1GB granularity if this range of > + * memory does not contain any SNP guest memory. > + */ > + for (pa = pa_start; pa < pa_end; pa += PUD_SIZE) { > + /* Bit zero passes the function to the RMPOPT instruction. */ > + on_each_cpu_mask(cpu_online_mask, rmpopt, > + (void *)(pa | RMPOPT_FUNC_VERIFY_AND_REPORT_STATUS), > + true); > + > + /* Give a chance for other threads to run */ > + cond_resched(); > + } Could you also put together some proper helpers, please? The lowest-level helper should look a lot like the instruction reference: void __rmpopt(u64 rax, u64 rcx) { asm volatile(".byte 0xf2, 0x0f, 0x01, 0xfc" : : "a" (rax), "c" (rcx) : "memory", "cc"); } Then you can have a higher-level instruction that shows how you convert the logical things "physical address" and "rmpopt_function" into the register arguments: void rmpopt(unsigned long pa) { u64 rax = ALIGN_DOWN(pa & SZ_1GB); u64 rcx = RMPOPT_FUNC_VERIFY_AND_REPORT_STATUS; __rmpopt(rax, rcx); } There's no need right now to pack and unpack rax/rcx from a pointer. Why even bother when rcx is a fixed value? > + set_current_state(TASK_INTERRUPTIBLE); > + schedule(); > + } > + > + return 0; > +} > + > +static void rmpopt_all_physmem(void) > +{ > + if (rmpopt_task) > + wake_up_process(rmpopt_task); > +} Wait a sec, doesn't this just run all the time? It'll be doing an RMPOPT on some forever.