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[34.127.0.230]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-39e36116920sm7796342a91.5.2026.09.17.18.40.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Sep 2026 18:40:49 -0700 (PDT) Date: Fri, 18 Sep 2026 01:40:45 +0000 From: Lisa Wang To: Xiaoyao Li Cc: Ackerley Tng , Andrew Jones , Binbin Wu , Chao Gao , Chenyi Qiang , Dave Hansen , Erdem Aktas , Kiryl Shutsemau , linux-kselftest@vger.kernel.org, Paolo Bonzini , "Pratik R. Sampat" , Reinette Chatre , Rick Edgecombe , Roger Wang , Ryan Afranji , Sagi Shahar , Sean Christopherson , Shuah Khan , Oliver Upton , Jeremiah McReynolds , kvm@vger.kernel.org, linux-coco@lists.linux.dev, linux-kernel@vger.kernel.org, x86@kernel.org Subject: Re: [PATCH v14 03/22] KVM: selftests: Initialize the TDX VM Message-ID: References: <20260722-tdx-selftests-v14-0-15ad654a50db@google.com> <20260722-tdx-selftests-v14-3-15ad654a50db@google.com> <07cf5761-48fe-40b7-9310-b64712f5e314@intel.com> Precedence: bulk X-Mailing-List: linux-coco@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <07cf5761-48fe-40b7-9310-b64712f5e314@intel.com> On Wed, Sep 09, 2026 at 06:00:53PM +0800, Xiaoyao Li wrote: > >> The reason we could not use __TEST_ASSERT_VM_VCPU_IOCTL() directly[2] is > >> because it formats ther return value as %i (32-bit), whereas > >> __tdx_vm_ioctl might return a u64 hardware error code. > >> > > Since we cannot simply use hw_error to replace ret, there will be not 32bit > vs 64bit issue. But ... > > >> I agree with your suggestion to introduce a new > >> TEST_ASSERT_TDX_VM_VCPU_IOCTL() macro to print out u64 hardware error > >> code properly. > > ... if we want to print hw_error as well, we still need a new macro. > > >> [2]: https://lore.kernel.org/all/a58e2941-77f9-43cf-a54d-023506dd7eb0@linux.intel.com/ > >> > > > > Is tdx_vm_ioctl() the only place where TEST_ASSERT_TDX_VM_VCPU_IOCTL() > > is going to be used though? If so, maybe we should defer introducing > > TEST_ASSERT_TDX_VM_VCPU_IOCTL() till later. > > I think tdx_vcpu_ioctl() will use it as well? Thanks for replying. I agree all of the other parts of your comments. Just wanted to point out one detail: tdx_vm_ioctl() is the only place that actually needs to evaluate hw_error right now. Unlike the VM-scoped ioctls in the x86 kernel code, the functions dispatched via tdx_vcpu_unlocked_ioctl() (such as tdx_vcpu_init or tdx_vcpu_init_mem_region) do not currently return the TDX SEAMCALL error codes into the hw_error field. Thus, I would prefer to inline TEST_ASSERT directly inside tdx_vm_ioctl() instead of introducing a new TEST_ASSERT_TDX_VM_VCPU_IOCTL() right now. Lisa > > I think the issue with if (ret) is just that TEST_ASSERT(!ret) already > > does that same check, and so we can drop the if (ret) part. > >