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From: Vasant Hegde <vasant.hegde@amd.com>
To: Sairaj Kodilkar <sarunkod@amd.com>,
	"Borislav Petkov (AMD)" <bp@alien8.de>,
	"H. Peter Anvin" <hpa@zytor.com>,
	"Joerg Roedel (AMD)" <joro@8bytes.org>,
	"Paul E. McKenney" <paulmck@kernel.org>,
	Andrew Morton <akpm@linux-foundation.org>,
	Breno Leitao <leitao@debian.org>,
	Christian Brauner <brauner@kernel.org>,
	Dapeng Mi <dapeng1.mi@linux.intel.com>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	Eric Biggers <ebiggers@kernel.org>,
	Ingo Molnar <mingo@redhat.com>, Jakub Kicinski <kuba@kernel.org>,
	Jonathan Corbet <corbet@lwn.net>,
	Kiryl Shutsemau <kas@kernel.org>,
	Li RongQing <lirongqing@baidu.com>,
	Marco Elver <elver@google.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Rick Edgecombe <rick.p.edgecombe@intel.com>,
	Robin Murphy <robin.murphy@arm.com>,
	Sean Christopherson <seanjc@google.com>,
	Shuah Khan <skhan@linuxfoundation.org>,
	Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
	Thomas Gleixner <tglx@kernel.org>, Will Deacon <will@kernel.org>,
	iommu@lists.linux.dev, kvm@vger.kernel.org,
	linux-coco@lists.linux.dev, linux-doc@vger.kernel.org,
	linux-kernel@vger.kernel.org, x86@kernel.org
Subject: Re: [PATCH v4 6/7] KVM: SVM: Add support for AMD IOMMU Guest APIC Physical Processor Interrupt (GAPPI)
Date: Fri, 21 Aug 2026 21:45:36 +0530	[thread overview]
Message-ID: <bdf29f6c-9f2e-4230-b5f5-5f25827f5b7a@amd.com> (raw)
In-Reply-To: <20260821055611.27138-7-sarunkod@amd.com>



On 8/21/2026 11:26 AM, Sairaj Kodilkar wrote:
> With AVIC guest-mode interrupt remapping, device interrupts are posted into
> the guest vAPIC backing page by the IOMMU. When the vCPU is not running
> (IRTE[IsRun] = 0), KVM must still be notified to schedule it. The legacy
> path uses the GA log.
> 
> GAPPI (Guest APIC Physical Processor Interrupt) is an alternative to the
> GA log mechanism provided by the AMD IOMMU. With GAPPI enabled, the IOMMU
> still updates the vAPIC backing page IRR, but the host wakeup notification
> is delivered as a physical APIC interrupt to IRTE[Destination], using
> IRTE[GATag][7:0] as the vector (POSTED_INTR_WAKEUP_VECTOR).
> 
> SVM follows the Intel posted-interrupt wakeup model. Each pCPU maintains
> a list of blocked vCPUs that may be woken by a GAPPI delivery to that CPU.
> When a vCPU blocks while waiting for an interrupt, SVM enqueues it on the
> wakeup list of the pCPU on which it was previously running and passes that
> same pCPU's physical APIC ID to the IOMMU to program IRTE[Destination].
> The rationale is that the vCPU is likely to run again on the same pCPU,
> which is common when vCPUs are pinned; targeting GAPPI notifications there
> reduces unnecessary VMEXITs from GAPPI deliveries on other CPUs. SVM
> registers the GAPPI handler via kvm_set_posted_intr_wakeup_handler(). On
> delivery, it walks the local vCPU list and wakes vCPUs with a pending IRR.
> 
> All GAPPI logic is gated on amd_iommu_gappi. Without it, KVM and the IOMMU
> falls back to the legacy GA log mechanism for vCPU wakeup.
> 
> Signed-off-by: Sairaj Kodilkar <sarunkod@amd.com>
> ---
>  arch/x86/kvm/svm/avic.c | 72 ++++++++++++++++++++++++++++++++++++-----
>  arch/x86/kvm/svm/svm.c  |  3 ++
>  arch/x86/kvm/svm/svm.h  |  5 +++
>  3 files changed, 72 insertions(+), 8 deletions(-)
> 
> diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c
> index dd497530d365..18ac24ef40e1 100644
> --- a/arch/x86/kvm/svm/avic.c
> +++ b/arch/x86/kvm/svm/avic.c
> @@ -874,6 +874,8 @@ int avic_init_vcpu(struct vcpu_svm *svm)
>  	INIT_LIST_HEAD(&svm->ir_list);
>  	raw_spin_lock_init(&svm->ir_list_lock);
>  
> +	svm->gappi_cpu = -1;

Can we initialize it to CPU0?
> +
>  	if (!enable_apicv || !irqchip_in_kernel(vcpu->kvm))
>  		return 0;
>  
> @@ -886,6 +888,20 @@ int avic_init_vcpu(struct vcpu_svm *svm)
>  	return ret;
>  }
>  
> +void avic_destroy_vcpu(struct vcpu_svm *svm)
> +{
> +	if (amd_iommu_gappi && svm->gappi_cpu != -1) {

Redundant amd_iommu_gappi check?

> +		unsigned long flags;
> +
> +		local_irq_save(flags);
> +
> +		kvm_pi_disable_wakeup_handler(&svm->vcpu, svm->gappi_cpu);
> +		svm->gappi_cpu = -1;

Redundant assignement?

-Vasant


  reply	other threads:[~2026-08-21 16:15 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-21  5:56 [PATCH v4 0/7] Add support for AMD IOMMU GAPPI Sairaj Kodilkar
2026-08-21  5:56 ` [PATCH v4 1/7] iommu/amd: KVM: SVM: Rename cpu to apicid in IOMMU interface Sairaj Kodilkar
2026-08-21 15:55   ` Vasant Hegde
2026-08-21  5:56 ` [PATCH v4 2/7] iommu/amd: KVM: SVM: Rename ga_log_intr to wakeup_intr " Sairaj Kodilkar
2026-08-21 15:55   ` Vasant Hegde
2026-08-21  5:56 ` [PATCH v4 3/7] iommu/amd: KVM: SVM: Add explicit vCPU running state to " Sairaj Kodilkar
2026-08-21 15:56   ` Vasant Hegde
2026-08-21  5:56 ` [PATCH v4 4/7] iommu/amd: Program guest-mode IRTEs for GAPPI wakeup when IRTE[IsRun] = 0 Sairaj Kodilkar
2026-08-21 15:56   ` Vasant Hegde
2026-08-21  5:56 ` [PATCH v4 5/7] KVM: VMX: Factor out wakeup list handling code to KVM Sairaj Kodilkar
2026-08-21  5:56 ` [PATCH v4 6/7] KVM: SVM: Add support for AMD IOMMU Guest APIC Physical Processor Interrupt (GAPPI) Sairaj Kodilkar
2026-08-21 16:15   ` Vasant Hegde [this message]
2026-08-21  5:56 ` [PATCH v4 7/7] iommu/amd: Provide kernel command line option to enable GAPPI Sairaj Kodilkar
2026-08-21  6:13   ` Randy Dunlap
2026-08-21  7:41     ` Sairaj Kodilkar
2026-08-21  7:38 ` [PATCH v4 0/7] Add support for AMD IOMMU GAPPI Sairaj Kodilkar

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