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Thu, 15 Oct 2026 14:22:33 +0000 Message-ID: Date: Thu, 15 Oct 2026 07:22:29 -0700 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 03/18] x86/resctrl: Add PLZA configuration definitions and data structures To: Babu Moger , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , References: <608876cedf5eece3f8b9297bcf21663a86a6380d.1790867441.git.babu.moger@amd.com> Content-Language: en-US From: Reinette Chatre In-Reply-To: <608876cedf5eece3f8b9297bcf21663a86a6380d.1790867441.git.babu.moger@amd.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: MW3PR05CA0012.namprd05.prod.outlook.com (2603:10b6:303:2b::17) To SJ2PR11MB8370.namprd11.prod.outlook.com (2603:10b6:a03:540::20) Precedence: bulk X-Mailing-List: linux-coco@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ2PR11MB8370:EE_|MW4PR11MB7055:EE_ X-MS-Office365-Filtering-Correlation-Id: 6a768f4e-5848-4909-3fdf-08df2ac7c0eb X-LD-Processed: 46c98d88-e344-4ed4-8496-4ed7712e255d,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|1800799024|366016|23010399003|56012099006|11063799006|261009223027099003|4143699003|22082099003|10067099003|18002099003|6133799003|3023799007; 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On 10/1/26 8:10 AM, Babu Moger wrote: > Privilege Level Zero Association (PLZA) enables the kernel to switch to > a different CLOSID and/or RMID than those used in user mode when entering > kernel mode. CLOSID and RMID selection are independent and can be > configured separately. That CLOSID and RMID are independent on x86 is clear to me. That they can be configured separately is not clear to me in this context. What does this "separate configuration" refer to? Looking at the later patches kernel mode allocation and monitoring associations are always configured together and written to same MSR at the same time? > > PLZA associations are programmed on a per-CPU basis through > MSR_IA32_PQR_PLZA_ASSOC (0xc00003fc), which contains the kernel RMID and > CLOSID values along with their corresponding enable bits. > > Make the register and its field layout available so kernel mode allocation > and monitoring associations can be configured independently. Could you please also elaborate what "configured independently" refers to? At this point it specifically refers to kernel mode and from what I understand kernel mode of allocation and monitoring are configured together. > > Signed-off-by: Babu Moger > --- ... > --- > arch/x86/include/asm/msr-index.h | 1 + > arch/x86/kernel/cpu/resctrl/internal.h | 49 ++++++++++++++++++++++++++ > 2 files changed, 50 insertions(+) > > diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h > index 82ca6356dc62..1331291f7a36 100644 > --- a/arch/x86/include/asm/msr-index.h > +++ b/arch/x86/include/asm/msr-index.h > @@ -1304,6 +1304,7 @@ > /* - AMD: */ > #define MSR_IA32_MBA_BW_BASE 0xc0000200 > #define MSR_IA32_SMBA_BW_BASE 0xc0000280 > +#define MSR_IA32_PQR_PLZA_ASSOC 0xc00003fc > #define MSR_IA32_L3_QOS_ABMC_CFG 0xc00003fd > #define MSR_IA32_L3_QOS_EXT_CFG 0xc00003ff > #define MSR_IA32_EVT_CFG_BASE 0xc0000400 > diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/resctrl/internal.h > index e3cfa0c10e92..44ecde20b1b4 100644 > --- a/arch/x86/kernel/cpu/resctrl/internal.h > +++ b/arch/x86/kernel/cpu/resctrl/internal.h > @@ -222,6 +222,55 @@ union l3_qos_abmc_cfg { > unsigned long full; > }; > > +/* > + * Privilege Level Zero Association (PLZA) is configured via > + * MSR_IA32_PQR_PLZA_ASSOC. > + * > + * @rmid : RMID programmed for PLZA. > + * @reserved1 : Reserved. > + * @rmid_en : Enable RMID for PLZA. > + * @closid : CLOSID programmed for PLZA. > + * @reserved2 : Reserved. > + * @closid_en : Enable CLOSID for PLZA. > + * @reserved3 : Reserved. > + * @plza_en : Enable PLZA. When enabled, PLZA applies to the > + * given CPU. > + * > + * The MSR_IA32_PQR_PLZA_ASSOC must be programmed on every CPU in a QoS > + * domain. Each domain supports a single PLZA CLOSID and/or RMID > + * association, and all fields except @plza_en must be programmed > + * identically across the domain to ensure consistent behavior. > + * > + * CLOSID and RMID selections are controlled independently. When PLZA is > + * enabled (@plza_en = 1), CPL0 uses CLOSID and RMID values from > + * MSR_IA32_PQR_PLZA_ASSOC depending on the corresponding enable bits. When > + * PLZA is disabled (@plza_en = 0), the CLOSID and RMID are always taken > + * from MSR_IA32_PQR_ASSOC regardless of privilege level. > + * > + * - @rmid_en = 1: use the RMID from MSR_IA32_PQR_PLZA_ASSOC if @plza_en = 1. > + * - @rmid_en = 0: use the RMID from MSR_IA32_PQR_ASSOC. > + * - @closid_en = 1: use the CLOSID from MSR_IA32_PQR_PLZA_ASSOC if @plza_en = 1. > + * - @closid_en = 0: use the CLOSID from MSR_IA32_PQR_ASSOC. > + * > + * This allows PLZA to override only RMID, only CLOSID, or both. If both > + * rmid_en and closid_en are clear, the effective behavior is the same as nit: rmid_en -> @rmid_en, closid_en -> @closid_en > + * when PLZA is disabled, with RMID and CLOSID used from MSR_IA32_PQR_ASSOC > + * irrespective of privilege level. > + */ > +union msr_pqr_plza_assoc { > + struct { > + u64 rmid :12, > + reserved1 :19, > + rmid_en : 1, > + closid : 4, > + reserved2 :11, > + closid_en : 1, > + reserved3 :15, > + plza_en : 1; > + } split; > + u64 full; > +}; > + > void rdt_ctrl_update(void *arg); > > int rdt_get_l3_mon_config(struct rdt_resource *r); Reinette