From: Gavin Shan <gshan@redhat.com>
To: Steven Price <steven.price@arm.com>,
kvm@vger.kernel.org, kvmarm@lists.linux.dev
Cc: Catalin Marinas <catalin.marinas@arm.com>,
Marc Zyngier <maz@kernel.org>, Will Deacon <will@kernel.org>,
James Morse <james.morse@arm.com>,
Oliver Upton <oliver.upton@linux.dev>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Zenghui Yu <yuzenghui@huawei.com>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Joey Gouly <joey.gouly@arm.com>,
Alexandru Elisei <alexandru.elisei@arm.com>,
Christoffer Dall <christoffer.dall@arm.com>,
Fuad Tabba <tabba@google.com>,
linux-coco@lists.linux.dev,
Ganapatrao Kulkarni <gankulkarni@os.amperecomputing.com>,
Shanker Donthineni <sdonthineni@nvidia.com>,
Alper Gun <alpergun@google.com>
Subject: Re: [PATCH v5 03/19] arm64: rsi: Add RSI definitions
Date: Mon, 9 Sep 2024 15:10:42 +1000 [thread overview]
Message-ID: <c44e9d4f-9ad2-4ff7-9b18-ede351950149@redhat.com> (raw)
In-Reply-To: <20240819131924.372366-4-steven.price@arm.com>
On 8/19/24 11:19 PM, Steven Price wrote:
> From: Suzuki K Poulose <suzuki.poulose@arm.com>
>
> The RMM (Realm Management Monitor) provides functionality that can be
> accessed by a realm guest through SMC (Realm Services Interface) calls.
>
> The SMC definitions are based on DEN0137[1] version 1.0-rel0-rc1.
>
> [1] https://developer.arm.com/-/cdn-downloads/permalink/PDF/Architectures/DEN0137_1.0-rel0-rc1_rmm-arch_external.pdf
>
> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
> Signed-off-by: Steven Price <steven.price@arm.com>
> ---
> Changes since v4:
> * Update to match the latest RMM spec version 1.0-rel0-rc1.
> * Make use of the ARM_SMCCC_CALL_VAL macro.
> * Cast using (_UL macro) various values to unsigned long.
> Changes since v3:
> * Drop invoke_rsi_fn_smc_with_res() function and call arm_smccc_smc()
> directly instead.
> * Rename header guard in rsi_smc.h to be consistent.
> Changes since v2:
> * Rename rsi_get_version() to rsi_request_version()
> * Fix size/alignment of struct realm_config
> ---
> arch/arm64/include/asm/rsi_cmds.h | 136 +++++++++++++++++++++
> arch/arm64/include/asm/rsi_smc.h | 189 ++++++++++++++++++++++++++++++
> 2 files changed, 325 insertions(+)
> create mode 100644 arch/arm64/include/asm/rsi_cmds.h
> create mode 100644 arch/arm64/include/asm/rsi_smc.h
>
With the following minor comments addressed:
Reviewed-by: Gavin Shan <gshan@redht.com>
> diff --git a/arch/arm64/include/asm/rsi_cmds.h b/arch/arm64/include/asm/rsi_cmds.h
> new file mode 100644
> index 000000000000..968b03f4e703
> --- /dev/null
> +++ b/arch/arm64/include/asm/rsi_cmds.h
> @@ -0,0 +1,136 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * Copyright (C) 2023 ARM Ltd.
> + */
> +
> +#ifndef __ASM_RSI_CMDS_H
> +#define __ASM_RSI_CMDS_H
> +
> +#include <linux/arm-smccc.h>
> +
> +#include <asm/rsi_smc.h>
> +
> +#define RSI_GRANULE_SHIFT 12
> +#define RSI_GRANULE_SIZE (_AC(1, UL) << RSI_GRANULE_SHIFT)
> +
> +enum ripas {
> + RSI_RIPAS_EMPTY = 0,
> + RSI_RIPAS_RAM = 1,
> + RSI_RIPAS_DESTROYED = 2,
> + RSI_RIPAS_IO = 3,
> +};
> +
The 'RSI_RIPAS_IO' corresponds to 'RIPAS_DEV' defined in tf-rmm/lib/s2tt/include/ripas.h.
Shall we rename it to RSI_RIPAS_DEV so that the name is matched with that defined in
tf-rmm?
---> tf-rmm/lib/s2tt/include/ripas.h
/*
* The RmmRipas enumeration represents realm IPA state.
*
* Map RmmRipas to RmiRipas to simplify code/decode operations.
*/
enum ripas {
RIPAS_EMPTY = RMI_EMPTY, /* Unused IPA for Realm */
RIPAS_RAM = RMI_RAM, /* IPA used for Code/Data by Realm */
RIPAS_DESTROYED = RMI_DESTROYED,/* IPA is inaccessible to the Realm */
RIPAS_DEV /* Address where memory of an assigned
Realm device is mapped */
};
> +static inline unsigned long rsi_request_version(unsigned long req,
> + unsigned long *out_lower,
> + unsigned long *out_higher)
> +{
> + struct arm_smccc_res res;
> +
> + arm_smccc_smc(SMC_RSI_ABI_VERSION, req, 0, 0, 0, 0, 0, 0, &res);
> +
> + if (out_lower)
> + *out_lower = res.a1;
> + if (out_higher)
> + *out_higher = res.a2;
> +
> + return res.a0;
> +}
> +
> +static inline unsigned long rsi_get_realm_config(struct realm_config *cfg)
> +{
> + struct arm_smccc_res res;
> +
> + arm_smccc_smc(SMC_RSI_REALM_CONFIG, virt_to_phys(cfg),
> + 0, 0, 0, 0, 0, 0, &res);
> + return res.a0;
> +}
> +
> +static inline unsigned long rsi_set_addr_range_state(phys_addr_t start,
> + phys_addr_t end,
> + enum ripas state,
> + unsigned long flags,
> + phys_addr_t *top)
> +{
> + struct arm_smccc_res res;
> +
> + arm_smccc_smc(SMC_RSI_IPA_STATE_SET, start, end, state,
> + flags, 0, 0, 0, &res);
> +
> + if (top)
> + *top = res.a1;
> +
> + return res.a0;
> +}
> +
> +/**
> + * rsi_attestation_token_init - Initialise the operation to retrieve an
> + * attestation token.
> + *
> + * @challenge: The challenge data to be used in the attestation token
> + * generation.
> + * @size: Size of the challenge data in bytes.
> + *
> + * Initialises the attestation token generation and returns an upper bound
> + * on the attestation token size that can be used to allocate an adequate
> + * buffer. The caller is expected to subsequently call
> + * rsi_attestation_token_continue() to retrieve the attestation token data on
> + * the same CPU.
> + *
> + * Returns:
> + * On success, returns the upper limit of the attestation report size.
> + * Otherwise, -EINVAL
> + */
> +static inline unsigned long
> +rsi_attestation_token_init(const u8 *challenge, unsigned long size)
> +{
> + struct arm_smccc_1_2_regs regs = { 0 };
> +
> + /* The challenge must be at least 32bytes and at most 64bytes */
> + if (!challenge || size < 32 || size > 64)
> + return -EINVAL;
> +
> + regs.a0 = SMC_RSI_ATTESTATION_TOKEN_INIT;
> + memcpy(®s.a1, challenge, size);
> + arm_smccc_1_2_smc(®s, ®s);
> +
> + if (regs.a0 == RSI_SUCCESS)
> + return regs.a1;
> +
> + return -EINVAL;
> +}
> +
The type of the return value would be 'long' instead of 'unsigned long' since
'-EINVAL' can be returned.
> +/**
> + * rsi_attestation_token_continue - Continue the operation to retrieve an
> + * attestation token.
> + *
> + * @granule: {I}PA of the Granule to which the token will be written.
> + * @offset: Offset within Granule to start of buffer in bytes.
> + * @size: The size of the buffer.
> + * @len: The number of bytes written to the buffer.
> + *
> + * Retrieves up to a RSI_GRANULE_SIZE worth of token data per call. The caller
> + * is expected to call rsi_attestation_token_init() before calling this
> + * function to retrieve the attestation token.
> + *
> + * Return:
> + * * %RSI_SUCCESS - Attestation token retrieved successfully.
> + * * %RSI_INCOMPLETE - Token generation is not complete.
> + * * %RSI_ERROR_INPUT - A parameter was not valid.
> + * * %RSI_ERROR_STATE - Attestation not in progress.
> + */
> +static inline int rsi_attestation_token_continue(phys_addr_t granule,
> + unsigned long offset,
> + unsigned long size,
> + unsigned long *len)
> +{
> + struct arm_smccc_res res;
> +
> + arm_smccc_1_1_invoke(SMC_RSI_ATTESTATION_TOKEN_CONTINUE,
> + granule, offset, size, 0, &res);
> +
> + if (len)
> + *len = res.a1;
> + return res.a0;
> +}
> +
> +#endif /* __ASM_RSI_CMDS_H */
> diff --git a/arch/arm64/include/asm/rsi_smc.h b/arch/arm64/include/asm/rsi_smc.h
> new file mode 100644
> index 000000000000..b76b03a8fea8
> --- /dev/null
> +++ b/arch/arm64/include/asm/rsi_smc.h
> @@ -0,0 +1,189 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * Copyright (C) 2023 ARM Ltd.
> + */
> +
> +#ifndef __ASM_RSI_SMC_H_
> +#define __ASM_RSI_SMC_H_
> +
> +#include <linux/arm-smccc.h>
> +
> +/*
> + * This file describes the Realm Services Interface (RSI) Application Binary
> + * Interface (ABI) for SMC calls made from within the Realm to the RMM and
> + * serviced by the RMM.
> + */
> +
> +/*
> + * The major version number of the RSI implementation. This is increased when
> + * the binary format or semantics of the SMC calls change.
> + */
> +#define RSI_ABI_VERSION_MAJOR UL(1)
> +
> +/*
> + * The minor version number of the RSI implementation. This is increased when
> + * a bug is fixed, or a feature is added without breaking binary compatibility.
> + */
> +#define RSI_ABI_VERSION_MINOR UL(0)
> +
> +#define RSI_ABI_VERSION ((RSI_ABI_VERSION_MAJOR << 16) | \
> + RSI_ABI_VERSION_MINOR)
> +
> +#define RSI_ABI_VERSION_GET_MAJOR(_version) ((_version) >> 16)
> +#define RSI_ABI_VERSION_GET_MINOR(_version) ((_version) & 0xFFFF)
> +
> +#define RSI_SUCCESS UL(0)
> +#define RSI_ERROR_INPUT UL(1)
> +#define RSI_ERROR_STATE UL(2)
> +#define RSI_INCOMPLETE UL(3)
> +#define RSI_ERROR_UNKNOWN UL(4)
> +
> +#define SMC_RSI_FID(n) ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \
> + ARM_SMCCC_SMC_64, \
> + ARM_SMCCC_OWNER_STANDARD, \
> + n)
> +
> +/*
> + * Returns RSI version.
> + *
> + * arg1 == Requested interface revision
> + * ret0 == Status /error
> + * ret1 == Lower implemented interface revision
> + * ret2 == Higher implemented interface revision
> + */
> +#define SMC_RSI_ABI_VERSION SMC_RSI_FID(0x190)
> +
> +/*
> + * Read feature register.
> + *
> + * arg1 == Feature register index
> + * ret0 == Status /error
^^^^^^^^^^^^^
Status / error
> + * ret1 == Feature register value
> + */
> +#define SMC_RSI_FEATURES SMC_RSI_FID(0x191)
> +
> +/*
> + * Read measurement for the current Realm.
> + *
> + * arg1 == Index, which measurements slot to read
> + * ret0 == Status / error
> + * ret1 == Measurement value, bytes: 0 - 7
> + * ret2 == Measurement value, bytes: 7 - 15
^^^^^^
8 - 15
> + * ret3 == Measurement value, bytes: 16 - 23
> + * ret4 == Measurement value, bytes: 24 - 31
> + * ret5 == Measurement value, bytes: 32 - 39
> + * ret6 == Measurement value, bytes: 40 - 47
> + * ret7 == Measurement value, bytes: 48 - 55
> + * ret8 == Measurement value, bytes: 56 - 63
> + */
> +#define SMC_RSI_MEASUREMENT_READ SMC_RSI_FID(0x192)
> +
> +/*
> + * Extend Realm Extensible Measurement (REM) value.
> + *
> + * arg1 == Index, which measurements slot to extend
> + * arg2 == Size of realm measurement in bytes, max 64 bytes
> + * arg3 == Measurement value, bytes: 0 - 7
> + * arg4 == Measurement value, bytes: 7 - 15
^^^^^^
8 - 15
> + * arg5 == Measurement value, bytes: 16 - 23
> + * arg6 == Measurement value, bytes: 24 - 31
> + * arg7 == Measurement value, bytes: 32 - 39
> + * arg8 == Measurement value, bytes: 40 - 47
> + * arg9 == Measurement value, bytes: 48 - 55
> + * arg10 == Measurement value, bytes: 56 - 63
> + * ret0 == Status / error
> + */
> +#define SMC_RSI_MEASUREMENT_EXTEND SMC_RSI_FID(0x193)
> +
> +/*
> + * Initialize the operation to retrieve an attestation token.
> + *
> + * arg1 == Challenge value, bytes: 0 - 7
> + * arg2 == Challenge value, bytes: 7 - 15
^^^^^^
8 - 15
> + * arg3 == Challenge value, bytes: 16 - 23
> + * arg4 == Challenge value, bytes: 24 - 31
> + * arg5 == Challenge value, bytes: 32 - 39
> + * arg6 == Challenge value, bytes: 40 - 47
> + * arg7 == Challenge value, bytes: 48 - 55
> + * arg8 == Challenge value, bytes: 56 - 63
> + * ret0 == Status / error
> + * ret1 == Upper bound of token size in bytes
> + */
> +#define SMC_RSI_ATTESTATION_TOKEN_INIT SMC_RSI_FID(0x194)
> +
> +/*
> + * Continue the operation to retrieve an attestation token.
> + *
> + * arg1 == The IPA of token buffer
> + * arg2 == Offset within the granule of the token buffer
> + * arg3 == Size of the granule buffer
> + * ret0 == Status / error
> + * ret1 == Length of token bytes copied to the granule buffer
> + */
> +#define SMC_RSI_ATTESTATION_TOKEN_CONTINUE SMC_RSI_FID(0x195)
> +
> +#ifndef __ASSEMBLY__
> +
> +struct realm_config {
> + union {
> + struct {
> + unsigned long ipa_bits; /* Width of IPA in bits */
> + unsigned long hash_algo; /* Hash algorithm */
> + };
> + u8 pad[0x200];
> + };
> + union {
> + u8 rpv[64]; /* Realm Personalization Value */
> + u8 pad2[0xe00];
> + };
> + /*
> + * The RMM requires the configuration structure to be aligned to a 4k
> + * boundary, ensure this happens by aligning this structure.
> + */
> +} __aligned(0x1000);
> +
> +#endif /* __ASSEMBLY__ */
> +
> +/*
> + * Read configuration for the current Realm.
> + *
> + * arg1 == struct realm_config addr
> + * ret0 == Status / error
> + */
> +#define SMC_RSI_REALM_CONFIG SMC_RSI_FID(0x196)
> +
> +/*
> + * Request RIPAS of a target IPA range to be changed to a specified value.
> + *
> + * arg1 == Base IPA address of target region
> + * arg2 == Top of the region
> + * arg3 == RIPAS value
> + * arg4 == flags
> + * ret0 == Status / error
> + * ret1 == Top of modified IPA range
> + */
> +#define SMC_RSI_IPA_STATE_SET SMC_RSI_FID(0x197)
> +
> +#define RSI_NO_CHANGE_DESTROYED UL(0)
> +#define RSI_CHANGE_DESTROYED UL(1)
> +
According to the linked specification, the description for the third return value
has been missed here.
ret2 == Whether the host accepted or rejected the request
> +/*
> + * Get RIPAS of a target IPA range.
> + *
> + * arg1 == Base IPA of target region
> + * arg2 == End of target IPA region
> + * ret0 == Status / error
> + * ret1 == Top of IPA region which has the reported RIPAS value
> + * ret2 == RIPAS value
> + */
> +#define SMC_RSI_IPA_STATE_GET SMC_RSI_FID(0x198)
> +
> +/*
> + * Make a Host call.
> + *
> + * arg1 == IPA of host call structure
> + * ret0 == Status / error
> + */
> +#define SMC_RSI_HOST_CALL SMC_RSI_FID(0x199)
> +
> +#endif /* __ASM_RSI_SMC_H_ */
Thanks,
Gavin
next prev parent reply other threads:[~2024-09-09 5:10 UTC|newest]
Thread overview: 67+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-19 13:19 [PATCH v5 00/19] arm64: Support for running as a guest in Arm CCA Steven Price
2024-08-19 13:19 ` [PATCH v5 01/19] arm64: mm: Add top-level dispatcher for internal mem_encrypt API Steven Price
2024-08-26 10:00 ` Catalin Marinas
2024-08-19 13:19 ` [PATCH v5 02/19] arm64: mm: Add confidential computing hook to ioremap_prot() Steven Price
2024-08-26 10:01 ` Catalin Marinas
2024-08-19 13:19 ` [PATCH v5 03/19] arm64: rsi: Add RSI definitions Steven Price
2024-08-26 10:01 ` Catalin Marinas
2024-09-09 5:10 ` Gavin Shan [this message]
2024-09-09 9:12 ` Steven Price
2024-08-19 13:19 ` [PATCH v5 04/19] firmware/psci: Add psci_early_test_conduit() Steven Price
2024-08-23 13:29 ` Will Deacon
2024-08-30 15:54 ` Steven Price
2024-08-26 10:03 ` Catalin Marinas
2024-09-13 13:52 ` Suzuki K Poulose
2024-09-09 23:56 ` Gavin Shan
2024-08-19 13:19 ` [PATCH v5 05/19] arm64: Detect if in a realm and set RIPAS RAM Steven Price
2024-08-19 14:04 ` Suzuki K Poulose
2024-08-19 14:10 ` Steven Price
2024-09-09 15:15 ` Shanker Donthineni
2024-08-26 10:03 ` Catalin Marinas
2024-08-30 15:54 ` Steven Price
2024-09-10 0:09 ` Gavin Shan
2024-09-06 18:58 ` Shanker Donthineni
2024-08-19 13:19 ` [PATCH v5 06/19] arm64: realm: Query IPA size from the RMM Steven Price
2024-08-26 10:04 ` Catalin Marinas
2024-09-10 0:18 ` Gavin Shan
2024-08-19 13:19 ` [PATCH v5 07/19] arm64: rsi: Add support for checking whether an MMIO is protected Steven Price
2024-08-26 10:04 ` Catalin Marinas
2024-09-06 4:32 ` Gavin Shan
2024-09-06 4:52 ` Gavin Shan
2024-09-06 13:55 ` Steven Price
2024-09-08 23:53 ` Gavin Shan
2024-09-09 9:31 ` Steven Price
2024-09-10 3:51 ` Gavin Shan
2024-08-19 13:19 ` [PATCH v5 08/19] fixmap: Allow architecture overriding set_fixmap_io Steven Price
2024-08-19 13:19 ` [PATCH v5 09/19] fixmap: Pass down the full phys address for set_fixmap_io Steven Price
2024-08-26 10:05 ` Catalin Marinas
2024-08-19 13:19 ` [PATCH v5 10/19] arm64: Override set_fixmap_io Steven Price
2024-08-19 14:13 ` Suzuki K Poulose
2024-08-30 15:54 ` Steven Price
2024-08-19 13:19 ` [PATCH v5 11/19] arm64: rsi: Map unprotected MMIO as decrypted Steven Price
2024-08-19 14:11 ` Suzuki K Poulose
2024-08-30 15:54 ` Steven Price
2024-08-19 13:19 ` [PATCH v5 12/19] efi: arm64: Map Device with Prot Shared Steven Price
2024-08-26 10:13 ` Catalin Marinas
2024-09-09 13:55 ` Matias Ezequiel Vara Larsen
2024-09-10 4:15 ` Gavin Shan
2024-09-10 9:15 ` Suzuki K Poulose
2024-08-19 13:19 ` [PATCH v5 13/19] arm64: Make the PHYS_MASK_SHIFT dynamic Steven Price
2024-08-26 10:31 ` Catalin Marinas
2024-08-19 13:19 ` [PATCH v5 14/19] arm64: Enforce bounce buffers for realm DMA Steven Price
2024-08-26 10:39 ` Catalin Marinas
2024-08-19 13:19 ` [PATCH v5 15/19] arm64: mm: Avoid TLBI when marking pages as valid Steven Price
2024-08-26 10:41 ` Catalin Marinas
2024-08-19 13:19 ` [PATCH v5 16/19] arm64: Enable memory encrypt for Realms Steven Price
2024-08-26 10:46 ` Catalin Marinas
2024-08-19 13:19 ` [PATCH v5 17/19] irqchip/gic-v3-its: Share ITS tables with a non-trusted hypervisor Steven Price
2024-08-19 14:27 ` Marc Zyngier
2024-08-19 14:51 ` Suzuki K Poulose
2024-08-19 15:24 ` Marc Zyngier
2024-08-19 22:19 ` Suzuki K Poulose
2024-10-18 4:49 ` Shanker Donthineni
2024-08-19 13:19 ` [PATCH v5 18/19] irqchip/gic-v3-its: Rely on genpool alignment Steven Price
2024-08-19 13:19 ` [PATCH v5 19/19] virt: arm-cca-guest: TSM_REPORT support for realms Steven Price
2024-09-02 3:53 ` Aneesh Kumar K.V
2024-09-27 15:21 ` Steven Price
2024-09-09 4:13 ` Gavin Shan
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