linux-coco.lists.linux.dev archive mirror
 help / color / mirror / Atom feed
From: Aneesh Kumar K.V <aneesh.kumar@kernel.org>
To: Dan Williams <dan.j.williams@intel.com>,
	Dan Williams <dan.j.williams@intel.com>,
	linux-coco@lists.linux.dev
Cc: Bjorn Helgaas <bhelgaas@google.com>,
	Lukas Wunner <lukas@wunner.de>, Samuel Ortiz <sameo@rivosinc.com>,
	Alexey Kardashevskiy <aik@amd.com>,
	Xu Yilun <yilun.xu@linux.intel.com>,
	linux-pci@vger.kernel.org, gregkh@linuxfoundation.org
Subject: Re: [PATCH 08/11] PCI/IDE: Add IDE establishment helpers
Date: Fri, 21 Feb 2025 21:23:50 +0530	[thread overview]
Message-ID: <yq5aa5afway9.fsf@kernel.org> (raw)
In-Reply-To: <67b6a3fa7ffb4_2d2c2947f@dwillia2-xfh.jf.intel.com.notmuch>

Dan Williams <dan.j.williams@intel.com> writes:

> Aneesh Kumar K.V wrote:
> [..]
>>
>> Also wondering should the stream id be unique at the rootport level? ie
>> for a config like below
>>
>> # pwd
>> /sys/devices/platform/40000000.pci/pci0000:00
>> # ls
>> 0000:00:01.0              available_secure_streams  power
>> 0000:00:02.0              pci_bus                   uevent
>> # lspci
>> 00:01.0 PCI bridge: ARM Device 0def
>> 00:02.0 PCI bridge: ARM Device 0def
>> 01:00.0 Unassigned class [ff00]: ARM Device ff80
>> 02:00.0 SATA controller: Device 0abc:aced (rev 01)
>> #
>> # lspci -t
>> -[0000:00]-+-01.0-[01]----00.0
>>            \-02.0-[02]----00.0
>> #
>>
>>
>> I should be able to use the same stream id to program both the rootports?
>
> For all the IDE capable platforms I know of the stream id allocation
> pool is segmented per host-bridge. Do you have a use case where root
> ports that share a host-bridge each have access to a distinct pool of
> IDE stream ids?

I am using FVP simulator for my development. Hence no real device. The spec states:
"
All IDE TLPs must be associated with an IDE Stream, identified via an IDE Stream ID.
◦ Software must assign IDE Stream IDs such that two Partner Ports use the same value for a given IDE
Stream.
◦ Software must assign IDE Stream IDs such that every enabled IDE Stream associated with a given
terminal Port is assigned a unique Stream ID value at that Port
◦ It is permitted for a platform to further restrict the assignment of Stream IDs.
"

If I understand correctly, the stream ID allocation pool per host bridge
qualifies as an additional platform restriction? If so, why is Linux
enforcing it? Wouldn’t it be more appropriate for the platform code to
handle this instead?

-aneesh

  reply	other threads:[~2025-02-21 15:53 UTC|newest]

Thread overview: 125+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-12-05 22:23 [PATCH 00/11] PCI/TSM: Core infrastructure for PCI device security (TDISP) Dan Williams
2024-12-05 22:23 ` [PATCH 01/11] configfs-tsm: Namespace TSM report symbols Dan Williams
2024-12-10  6:08   ` Alexey Kardashevskiy
2024-12-11 13:55   ` Suzuki K Poulose
2024-12-05 22:23 ` [PATCH 02/11] coco/guest: Move shared guest CC infrastructure to drivers/virt/coco/guest/ Dan Williams
2024-12-10  6:09   ` Alexey Kardashevskiy
2024-12-05 22:23 ` [PATCH 03/11] coco/tsm: Introduce a class device for TEE Security Managers Dan Williams
2025-01-28 12:17   ` Jonathan Cameron
2025-02-25 21:08     ` Dan Williams
2024-12-05 22:23 ` [PATCH 04/11] PCI/IDE: Selective Stream IDE enumeration Dan Williams
2024-12-10  3:08   ` Aneesh Kumar K.V
2024-12-12  6:32     ` Xu Yilun
2025-02-22  0:42       ` Dan Williams
2025-02-20  3:17     ` Dan Williams
2024-12-10  6:18   ` Alexey Kardashevskiy
2025-02-20  3:59     ` Dan Williams
2024-12-10  7:05   ` Alexey Kardashevskiy
2024-12-12  6:06     ` Xu Yilun
2024-12-18 10:35       ` Alexey Kardashevskiy
2025-02-22  0:30       ` Dan Williams
2025-02-20 18:07     ` Dan Williams
2025-02-21  0:53       ` Alexey Kardashevskiy
2025-02-27 23:46         ` Dan Williams
2024-12-10 19:24   ` Bjorn Helgaas
2025-02-22  0:13     ` Dan Williams
2025-01-30 10:45   ` Jonathan Cameron
2025-02-26  0:21     ` Dan Williams
2024-12-05 22:23 ` [PATCH 05/11] PCI/TSM: Authenticate devices via platform TSM Dan Williams
2024-12-10 10:18   ` Alexey Kardashevskiy
2025-02-21  8:13     ` Aneesh Kumar K.V
2025-02-25  7:17       ` Xu Yilun
2025-02-26 12:10         ` Aneesh Kumar K.V
2025-02-26 12:13           ` [RFC PATCH 1/7] tsm: Select PCI_DOE which is required for PCI_TSM Aneesh Kumar K.V (Arm)
2025-02-26 12:13             ` [RFC PATCH 2/7] tsm: Move tsm core outside the host directory Aneesh Kumar K.V (Arm)
2025-02-26 12:13             ` [RFC PATCH 3/7] tsm: vfio: Add tsm bind/unbind support Aneesh Kumar K.V (Arm)
2025-02-26 12:13             ` [RFC PATCH 4/7] tsm: Allow tsm ops function to be called for multi-function devices Aneesh Kumar K.V (Arm)
2025-02-26 12:13             ` [RFC PATCH 5/7] tsm: Don't error out for doe mailbox failure Aneesh Kumar K.V (Arm)
2025-02-26 12:13             ` [RFC PATCH 6/7] tsm: Allow tsm connect ops to be used for multiple operations Aneesh Kumar K.V (Arm)
2025-02-26 12:13             ` [RFC PATCH 7/7] tsm: Add secure SPDM support Aneesh Kumar K.V (Arm)
2025-02-27  6:50               ` Xu Yilun
2025-02-27  6:35           ` [PATCH 05/11] PCI/TSM: Authenticate devices via platform TSM Xu Yilun
2025-02-27 13:57             ` Aneesh Kumar K.V
2025-02-28  1:26               ` Xu Yilun
2025-02-28  9:48                 ` Aneesh Kumar K.V
2025-03-01  7:50                   ` Xu Yilun
2025-03-07  3:07                   ` Alexey Kardashevskiy
2025-02-27 19:53           ` Dan Williams
2025-02-28 10:06             ` Aneesh Kumar K.V
2025-02-21 20:42     ` Dan Williams
2025-02-25  4:45       ` Alexey Kardashevskiy
2025-02-28  3:09         ` Dan Williams
2024-12-10 18:52   ` Bjorn Helgaas
2025-02-21 22:32     ` Dan Williams
2024-12-12  9:50   ` Xu Yilun
2025-02-22  1:15     ` Dan Williams
2025-02-24 11:02       ` Xu Yilun
2025-02-28  0:15         ` Dan Williams
2025-02-28  9:39           ` Xu Yilun
2025-01-30 11:45   ` Jonathan Cameron
2025-02-26  0:50     ` Dan Williams
2024-12-05 22:23 ` [PATCH 06/11] samples/devsec: PCI device-security bus / endpoint sample Dan Williams
2024-12-06  4:23   ` kernel test robot
2024-12-09  3:40   ` kernel test robot
2025-01-30 13:21   ` Jonathan Cameron
2025-02-26  2:00     ` Dan Williams
2024-12-05 22:23 ` [PATCH 07/11] PCI: Add PCIe Device 3 Extended Capability enumeration Dan Williams
2024-12-09 13:17   ` Ilpo Järvinen
2025-02-20  3:05     ` Dan Williams
2025-02-20  3:09       ` Dan Williams
2024-12-10 19:21   ` Bjorn Helgaas
2024-12-11 13:22     ` Ilpo Järvinen
2025-02-22  0:15       ` Dan Williams
2025-02-24 15:09         ` Ilpo Järvinen
2025-02-28  0:29           ` Dan Williams
2025-02-21 23:34     ` Dan Williams
2025-02-25  2:25       ` Alexey Kardashevskiy
2024-12-05 22:24 ` [PATCH 08/11] PCI/IDE: Add IDE establishment helpers Dan Williams
2024-12-10  3:19   ` Aneesh Kumar K.V
2024-12-10  3:37     ` Aneesh Kumar K.V
2025-02-20  3:39       ` Dan Williams
2025-02-21 15:53         ` Aneesh Kumar K.V [this message]
2025-02-25  0:46           ` Dan Williams
2025-01-07 20:19     ` Xu Yilun
2025-01-10 13:25       ` Aneesh Kumar K.V
2025-02-24 22:31         ` Dan Williams
2025-02-25  2:29           ` Alexey Kardashevskiy
2025-02-20  3:28     ` Dan Williams
2024-12-10  7:07   ` Alexey Kardashevskiy
2025-02-20 21:44     ` Dan Williams
2024-12-10 18:47   ` Bjorn Helgaas
2025-02-21 22:02     ` Dan Williams
2024-12-12 10:50   ` Xu Yilun
2024-12-19  7:25   ` Alexey Kardashevskiy
2024-12-19 10:05     ` Alexey Kardashevskiy
2025-01-07 20:00       ` Xu Yilun
2025-01-09  2:35         ` Alexey Kardashevskiy
2025-01-09 21:28           ` Xu Yilun
2025-01-15  0:20             ` Alexey Kardashevskiy
2025-02-25  0:06               ` Dan Williams
2025-02-25  3:39                 ` Alexey Kardashevskiy
2025-02-28  2:26                   ` Dan Williams
2025-03-04  0:03                     ` Alexey Kardashevskiy
2025-03-04  0:57                       ` Dan Williams
2025-03-04  1:31                         ` Alexey Kardashevskiy
2025-03-04 17:59                           ` Dan Williams
2025-02-20  4:19             ` Alexey Kardashevskiy
2025-02-24 22:24         ` Dan Williams
2025-02-25  2:45           ` Xu Yilun
2025-02-24 20:28       ` Dan Williams
2025-02-26  1:54         ` Alexey Kardashevskiy
2025-02-24 20:24     ` Dan Williams
2025-02-25  5:01       ` Xu Yilun
2024-12-05 22:24 ` [PATCH 09/11] PCI/IDE: Report available IDE streams Dan Williams
2024-12-06  0:12   ` kernel test robot
2024-12-06  0:43   ` kernel test robot
2025-02-11  6:10   ` Alexey Kardashevskiy
2025-02-27 23:35     ` Dan Williams
2024-12-05 22:24 ` [PATCH 10/11] PCI/TSM: Report active " Dan Williams
2024-12-10 18:49   ` Bjorn Helgaas
2025-02-21 22:28     ` Dan Williams
2024-12-05 22:24 ` [PATCH 11/11] samples/devsec: Add sample IDE establishment Dan Williams
2025-01-30 13:39   ` Jonathan Cameron
2025-02-27 23:27     ` Dan Williams
2024-12-06  6:05 ` [PATCH 00/11] PCI/TSM: Core infrastructure for PCI device security (TDISP) Greg KH
2024-12-06  8:44   ` Dan Williams

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=yq5aa5afway9.fsf@kernel.org \
    --to=aneesh.kumar@kernel.org \
    --cc=aik@amd.com \
    --cc=bhelgaas@google.com \
    --cc=dan.j.williams@intel.com \
    --cc=gregkh@linuxfoundation.org \
    --cc=linux-coco@lists.linux.dev \
    --cc=linux-pci@vger.kernel.org \
    --cc=lukas@wunner.de \
    --cc=sameo@rivosinc.com \
    --cc=yilun.xu@linux.intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).