From: Tim Chen <tim.c.chen@linux.intel.com>
To: Herbert Xu <herbert@gondor.apana.org.au>,
"H. Peter Anvin" <hpa@zytor.com>,
"David S.Miller" <davem@davemloft.net>
Cc: Kirk Yap <kirk.s.yap@intel.com>,
David Cote <david.m.cote@intel.com>,
James Guilford <james.guilford@intel.com>,
Wajdi Feghali <wajdi.k.feghali@intel.com>,
linux-kernel <linux-kernel@vger.kernel.org>,
linux-crypto@vger.kernel.org
Subject: [PATCH 00/11] Optimize SHA256 and SHA512 for Intel x86_64 with SSSE3, AVX or AVX2 instructions
Date: Fri, 22 Mar 2013 14:28:57 -0700 [thread overview]
Message-ID: <1363987737.8972.54.camel@schen9-DESK> (raw)
In-Reply-To: cover.1363961999.git.tim.c.chen@linux.intel.com
Herbert,
The following patch series provides optimized SHA256 and SHA512 routines
using the SSSE3, AVX or AVX2 instructions on x86_64 for Intel cpus.
Depending on cpu capabilities, speedup between 40% to 70% or more can be achieved
over the generic SHA256 and SHA512 routines.
Tim Chen (11):
Added macro to check for AVX2 feature.
Expose SHA256 generic routine to be callable externally.
Optimized sha256 x86_64 assembly routine using Supplemental SSE3
instructions.
Optimized sha256 x86_64 assembly routine with AVX instructions.
Optimized sha256 x86_64 routine using AVX2's RORX instructions
Create module providing optimized SHA256 routines using SSSE3,
AVX or AVX2 instructions.
Expose generic sha512 routine to be callable from other modules
Optimized SHA512 x86_64 assembly routine using Supplemental SSE3
instructions.
Optimized SHA512 x86_64 assembly routine using AVX instructions.
Optimized SHA512 x86_64 assembly routine using AVX2 RORX instruction.
Create module providing optimized SHA512 routines using SSSE3,
AVX or AVX2 instructions.
arch/x86/crypto/Makefile | 4 +
arch/x86/crypto/sha256-avx-asm.S | 493 +++++++++++++++++++++++
arch/x86/crypto/sha256-avx2-asm.S | 769 ++++++++++++++++++++++++++++++++++++
arch/x86/crypto/sha256-ssse3-asm.S | 504 +++++++++++++++++++++++
arch/x86/crypto/sha256_ssse3_glue.c | 269 +++++++++++++
arch/x86/crypto/sha512-avx-asm.S | 420 ++++++++++++++++++++
arch/x86/crypto/sha512-avx2-asm.S | 741 ++++++++++++++++++++++++++++++++++
arch/x86/crypto/sha512-ssse3-asm.S | 419 ++++++++++++++++++++
arch/x86/crypto/sha512_ssse3_glue.c | 276 +++++++++++++
arch/x86/include/asm/cpufeature.h | 1 +
crypto/Kconfig | 22 ++
crypto/sha256_generic.c | 11 +-
crypto/sha512_generic.c | 13 +-
include/crypto/sha.h | 5 +
14 files changed, 3936 insertions(+), 11 deletions(-)
create mode 100644 arch/x86/crypto/sha256-avx-asm.S
create mode 100644 arch/x86/crypto/sha256-avx2-asm.S
create mode 100644 arch/x86/crypto/sha256-ssse3-asm.S
create mode 100644 arch/x86/crypto/sha256_ssse3_glue.c
create mode 100644 arch/x86/crypto/sha512-avx-asm.S
create mode 100644 arch/x86/crypto/sha512-avx2-asm.S
create mode 100644 arch/x86/crypto/sha512-ssse3-asm.S
create mode 100644 arch/x86/crypto/sha512_ssse3_glue.c
--
1.7.11.7
next parent reply other threads:[~2013-03-22 21:28 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <cover.1363961999.git.tim.c.chen@linux.intel.com>
2013-03-22 21:28 ` Tim Chen [this message]
2013-03-22 21:29 ` [PATCH 01/11] Added macro to check for AVX2 feature Tim Chen
2013-03-23 0:21 ` H. Peter Anvin
2013-03-23 0:33 ` Tim Chen
2013-03-23 0:55 ` H. Peter Anvin
2013-03-22 21:29 ` [PATCH 02/11] Expose SHA256 generic routine to be callable externally Tim Chen
2013-03-22 21:29 ` [PATCH 03/11] Optimized sha256 x86_64 assembly routine using Supplemental SSE3 instructions Tim Chen
2013-03-24 12:26 ` Jussi Kivilinna
2013-03-22 21:29 ` [PATCH 04/11] Optimized sha256 x86_64 assembly routine with AVX instructions Tim Chen
2013-03-22 21:29 ` [PATCH 05/11] Optimized sha256 x86_64 routine using AVX2's RORX instructions Tim Chen
2013-03-22 21:29 ` [PATCH 06/11] Create module providing optimized SHA256 routines using SSSE3, AVX or AVX2 instructions Tim Chen
2013-03-24 11:30 ` Jussi Kivilinna
2013-03-24 21:52 ` Jussi Kivilinna
2013-03-25 20:40 ` Tim Chen
2013-03-22 21:29 ` [PATCH 07/11] Expose generic sha512 routine to be callable from other modules Tim Chen
2013-03-22 21:29 ` [PATCH 08/11] Optimized SHA512 x86_64 assembly routine using Supplemental SSE3 instructions Tim Chen
2013-03-22 21:29 ` [PATCH 09/11] Optimized SHA512 x86_64 assembly routine using AVX instructions Tim Chen
2013-03-22 21:29 ` [PATCH 10/11] Optimized SHA512 x86_64 assembly routine using AVX2 RORX instruction Tim Chen
2013-03-22 21:29 ` [PATCH 11/11] Create module providing optimized SHA512 routines using SSSE3, AVX or AVX2 instructions Tim Chen
2013-03-24 11:36 ` Jussi Kivilinna
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1363987737.8972.54.camel@schen9-DESK \
--to=tim.c.chen@linux.intel.com \
--cc=davem@davemloft.net \
--cc=david.m.cote@intel.com \
--cc=herbert@gondor.apana.org.au \
--cc=hpa@zytor.com \
--cc=james.guilford@intel.com \
--cc=kirk.s.yap@intel.com \
--cc=linux-crypto@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=wajdi.k.feghali@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox