From: Radu Solea <radu.solea@nxp.com>
To: "herbert@gondor.apana.org.au" <herbert@gondor.apana.org.au>
Cc: "davem@davemloft.net" <davem@davemloft.net>,
"linux-crypto@vger.kernel.org" <linux-crypto@vger.kernel.org>,
"Horia Geantă" <horia.geanta@nxp.com>
Subject: Re: [RFC PATCH] gcm - fix setkey cache coherence issues
Date: Fri, 23 Jun 2017 07:33:20 +0000 [thread overview]
Message-ID: <1498203199.26231.21.camel@nxp.com> (raw)
In-Reply-To: <20170623063154.GA29002@gondor.apana.org.au>
On Vi, 2017-06-23 at 14:31 +0800, Herbert Xu wrote:
>
> The crypto API cannot rely on users providing aligned buffers. So
> if your driver has an alignment requirement, it either has to use
> the existing crypto API alignmask setting which can cope with some
> unaligned inputs, e.g., the IV if you use the skcipher walk
> mechanism,
> or you must copy unaligned data yourself before performing DMA on
> them.
>
> Cheers,
Normally I would agree with you, if it's a weird requirement coming
from hardware or driver. In this case I think it's different. This is
not a limitation coming from one driver or one particular hardware
variety. It applies to all platforms that do not have hw cache
coherence and a large enough cacheline.
A couple of lines below the allocation hash is linked into a
scatterlist, a data structure with remarkably high chances of ending up
in a DMA endpoint, yet we choose to ignore all other DMA requirements?
Cheers,
Radu.
next prev parent reply other threads:[~2017-06-23 7:33 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-21 14:29 [RFC PATCH] gcm - fix setkey cache coherence issues Radu Solea
2017-06-22 2:40 ` Herbert Xu
[not found] ` <DB6PR04MB317607AE27DD1AC235D0103C8BDB0@DB6PR04MB3176.eurprd04.prod.outlook.com>
2017-06-22 7:53 ` Herbert Xu
2017-06-22 13:56 ` Radu Solea
2017-06-23 6:31 ` Herbert Xu
2017-06-23 7:33 ` Radu Solea [this message]
2017-06-23 7:43 ` Herbert Xu
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