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From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: Arnd Bergmann <arnd@arndb.de>
Cc: linux-arm-kernel@lists.infradead.org,
	Vinod Koul <vinod.koul@intel.com>,
	Dan Williams <dan.j.williams@intel.com>,
	Gregory Clement <gregory.clement@free-electrons.com>,
	Jason Cooper <jason@lakedaemon.net>, Andrew Lunn <andrew@lunn.ch>,
	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
	Lior Amsalem <alior@marvell.com>,
	Herbert Xu <herbert@gondor.apana.org.au>,
	Thomas Petazzoni <thomas@free-electrons.com>,
	linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org,
	dmaengine@vger.kernel.org,
	"David S. Miller" <davem@davemloft.net>
Subject: Re: [PATCH 2/8] dmaengine: mv_xor: add support for a38x command in descriptor mode
Date: Wed, 13 May 2015 10:15:35 +0200	[thread overview]
Message-ID: <20150513081535.GS10961@lukather> (raw)
In-Reply-To: <4862159.g8Sk9nOiS2@wuerfel>

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Hi Arnd,

On Tue, May 12, 2015 at 05:49:08PM +0200, Arnd Bergmann wrote:
> On Tuesday 12 May 2015 17:37:37 Maxime Ripard wrote:
> > From: Lior Amsalem <alior@marvell.com>
> > 
> > The Marvell Armada 38x SoC introduce new features to the XOR engine,
> > especially the fact that the engine mode (MEMCPY/XOR/PQ/etc) can be part of
> > the descriptor and not set through the controller registers.
> > 
> > This new feature allows mixing of different commands (even PQ) on the same
> > channel/chain without the need to stop the engine to reconfigure the engine
> > mode.
> > 
> > Refactor the driver to be able to use that new feature on the Armada 38x,
> > while keeping the old behaviour on the older SoCs.
> > 
> > Signed-off-by: Lior Amsalem <alior@marvell.com>
> > Reviewed-by: Ofer Heifetz <oferh@marvell.com>
> > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> 
> Two minimal style comments:
> 
> > +static void mv_chan_set_mode_to_desc(struct mv_xor_chan *chan)
> > +{
> > +	u32 op_mode;
> > +	u32 config = readl_relaxed(XOR_CONFIG(chan));
> > +
> > +	op_mode = XOR_OPERATION_MODE_IN_DESC;
> > +
> > +	config &= ~0x7;
> > +	config |= op_mode;
> > +
> > +#if defined(__BIG_ENDIAN)
> > +	config |= XOR_DESCRIPTOR_SWAP;
> > +#else
> > +	config &= ~XOR_DESCRIPTOR_SWAP;
> > +#endif
> > +
> > +	writel_relaxed(config, XOR_CONFIG(chan));
> > +}
> 
> Using 
> 
> 	if (IS_ENABLED(__BIG_ENDIAN))
> 
> here would make it more readable by avoiding the #if.

Indeed. I'll change that.

> Alternatively, you could leave the XOR_DESCRIPTOR_SWAP flag disabled
> and just swap the descriptors manually like a lot of other drivers
> do. You have to swap the mmio accesses anywya.

That won't be easily doable however.

Not only the endianness of the individual fields in the descriptor
changes, but changing the endianness also swaps the fields themselves
by pair of u32.

You can see that here:
http://lxr.free-electrons.com/source/drivers/dma/mv_xor.h#L159

So I'm guessing that leaving it like it is was the more readable
solution.

> >  }
> >  
> > +#ifdef CONFIG_OF
> > +static const struct of_device_id mv_xor_dt_ids[] = {
> > +	{ .compatible = "marvell,orion-xor", .data = (void *)XOR_MODE_IN_REG },
> > +	{ .compatible = "marvell,a38x-xor", .data = (void *)XOR_MODE_IN_DESC },
> > +	{},
> > +};
> > +MODULE_DEVICE_TABLE(of, mv_xor_dt_ids);
> > +#endif
> > +
> 
> Just leave out the #ifdef here. Almost all the mvebu machines use DT now,
> so it's not worth the size benefit of leaving it out on the few machines
> that don't.
> 
> You'll have to remove the of_match_ptr() invocation as well if you do that,
> to avoid a warning about an unused symbol.

Will do.

Thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

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  parent reply	other threads:[~2015-05-13  8:15 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-12 15:37 [PATCH 0/8] ARM: mvebu: Add support for RAID6 PQ offloading Maxime Ripard
2015-05-12 15:37 ` [PATCH 1/8] dmaengine: mv_xor: Rename function for consistent naming Maxime Ripard
2015-05-12 15:37 ` [PATCH 2/8] dmaengine: mv_xor: add support for a38x command in descriptor mode Maxime Ripard
2015-05-12 15:49   ` Arnd Bergmann
2015-05-12 15:54     ` Thomas Petazzoni
2015-05-12 16:03       ` Arnd Bergmann
2015-05-13  8:15     ` Maxime Ripard [this message]
2015-05-13  8:46       ` Arnd Bergmann
2015-05-12 15:49   ` Thomas Petazzoni
2015-05-12 15:58     ` Andrew Lunn
2015-05-12 16:05       ` Thomas Petazzoni
2015-05-13  8:23         ` Maxime Ripard
2015-05-12 15:37 ` [PATCH 3/8] dmaengine: mv_xor: Enlarge descriptor pool size Maxime Ripard
2015-05-12 15:37 ` [PATCH 4/8] dmaengine: mv_xor: improve descriptors list handling and reduce locking Maxime Ripard
2015-05-12 15:37 ` [PATCH 5/8] dmaengine: mv_xor: bug fix for racing condition in descriptors cleanup Maxime Ripard
2015-05-12 15:51   ` Thomas Petazzoni
2015-05-12 15:37 ` [PATCH 6/8] async_tx: adding mult and sum_product flags Maxime Ripard
2015-05-12 16:05   ` Andrew Lunn
2015-05-13  8:45     ` Maxime Ripard
2015-05-12 15:37 ` [PATCH 7/8] dmaengine: mv_xor: add support for a38x RAID6 support Maxime Ripard
2015-05-12 15:37 ` [PATCH 8/8] ARM: mvebu: a38x: Enable A38x XOR engine features Maxime Ripard
2015-05-12 16:13   ` Andrew Lunn
2015-05-13  7:16     ` Lior Amsalem
2015-05-13  8:33       ` Maxime Ripard
2015-05-12 16:05 ` [PATCH 0/8] ARM: mvebu: Add support for RAID6 PQ offloading Dan Williams
2015-05-13  9:17   ` Maxime Ripard
2015-05-13 16:00     ` Dan Williams
2015-05-18  9:14       ` Maxime Ripard
2015-05-18 17:06         ` Dan Williams
2015-05-26  9:45           ` Maxime Ripard
2015-05-26 16:31             ` Dan Williams
2015-05-27 11:52               ` Boaz Harrosh
2015-06-02 14:41               ` Maxime Ripard

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