From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
To: Antoine Tenart <antoine.tenart@free-electrons.com>
Cc: herbert@gondor.apana.org.au, davem@davemloft.net,
jason@lakedaemon.net, andrew@lunn.ch,
gregory.clement@free-electrons.com,
sebastian.hesselbarth@gmail.com, linux-crypto@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, oferh@marvell.com,
igall@marvell.com, nadavh@marvell.com, robin.murphy@arm.com
Subject: Re: [PATCH v5 1/4] Documentation/bindings: Document the SafeXel cryptographic engine driver
Date: Mon, 22 May 2017 21:34:16 +0200 [thread overview]
Message-ID: <20170522213416.7440ee32@free-electrons.com> (raw)
In-Reply-To: <20170522144514.6654-2-antoine.tenart@free-electrons.com>
Hello,
On Mon, 22 May 2017 16:45:11 +0200, Antoine Tenart wrote:
> + interrupts = <GIC_SPI 34 (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_LEVEL_HIGH)>,
You already got the feedback previously that an interrupt that is both
edge and level at the same time doesn't make sense. Could you fix this?
Also, the DTs that have already been merged by Grégory are wrong for
the same reason and should be fixed.
Thanks!
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
next prev parent reply other threads:[~2017-05-22 19:34 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-22 14:45 [PATCH v5 0/4] arm64: marvell: add cryptographic engine support for 7k/8k Antoine Tenart
2017-05-22 14:45 ` [PATCH v5 1/4] Documentation/bindings: Document the SafeXel cryptographic engine driver Antoine Tenart
2017-05-22 19:34 ` Thomas Petazzoni [this message]
2017-05-23 7:13 ` Antoine Tenart
2017-05-22 14:45 ` [PATCH v5 2/4] crypto: inside-secure: add SafeXcel EIP197 crypto " Antoine Tenart
2017-05-22 14:45 ` [PATCH v5 3/4] MAINTAINERS: add a maintainer for the Inside Secure crypto driver Antoine Tenart
2017-05-22 14:45 ` [PATCH v5 4/4] arm64: marvell: dts: add dma-mask in crypto nodes for 7k/8k Antoine Tenart
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