From: Will Deacon <will.deacon@arm.com>
To: Herbert Xu <herbert@gondor.apana.org.au>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
"open list:HARDWARE RANDOM NUMBER GENERATOR CORE"
<linux-crypto@vger.kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Eric Biggers <ebiggers@google.com>,
"Suzuki K. Poulose" <suzuki.poulose@arm.com>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 2/4] arm64: cpufeature: add feature for CRC32 instructions
Date: Tue, 4 Sep 2018 10:38:45 +0100 [thread overview]
Message-ID: <20180904093844.GA12148@arm.com> (raw)
In-Reply-To: <20180904031855.mjpdndeh57lqziuk@gondor.apana.org.au>
On Tue, Sep 04, 2018 at 11:18:55AM +0800, Herbert Xu wrote:
> On Tue, Aug 28, 2018 at 08:43:35PM +0200, Ard Biesheuvel wrote:
> > On 28 August 2018 at 19:01, Will Deacon <will.deacon@arm.com> wrote:
> > > On Mon, Aug 27, 2018 at 01:02:43PM +0200, Ard Biesheuvel wrote:
> > >> Add a CRC32 feature bit and wire it up to the CPU id register so we
> > >> will be able to use alternatives patching for CRC32 operations.
> > >>
> > >> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> > >> ---
> > >> arch/arm64/include/asm/cpucaps.h | 3 ++-
> > >> arch/arm64/kernel/cpufeature.c | 9 +++++++++
> > >> 2 files changed, 11 insertions(+), 1 deletion(-)
> > >
> > > Acked-by: Will Deacon <will.deacon@arm.com>
> > >
> > > With the minor caveat below...
> > >
> > >> diff --git a/arch/arm64/include/asm/cpucaps.h b/arch/arm64/include/asm/cpucaps.h
> > >> index ae1f70450fb2..9932aca9704b 100644
> > >> --- a/arch/arm64/include/asm/cpucaps.h
> > >> +++ b/arch/arm64/include/asm/cpucaps.h
> > >> @@ -51,7 +51,8 @@
> > >> #define ARM64_SSBD 30
> > >> #define ARM64_MISMATCHED_CACHE_TYPE 31
> > >> #define ARM64_HAS_STAGE2_FWB 32
> > >> +#define ARM64_HAS_CRC32 33
> > >>
> > >> -#define ARM64_NCAPS 33
> > >> +#define ARM64_NCAPS 34
> > >
> > >
> > > ... if this goes via crypto, you'll almost certainly get a (trivial)
> > > conflict with arm64, since these numbers get bumped all the time.
> > >
> >
> > I think the first three patches should go through the arm64 tree. The
> > last one just removes the now redundant crc32 SIMD driver, and Herbert
> > could pick that up separately, i.e., it should be totally independent.
>
> Yes let's do that.
Okey doke! In which case, please can we have your Ack on the first patch?
Cheers,
Will
next prev parent reply other threads:[~2018-09-04 9:38 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-27 11:02 [PATCH 0/4] arm64: wire CRC32 instructions into core crc32 routines Ard Biesheuvel
2018-08-27 11:02 ` [PATCH 1/4] lib/crc32: make core crc32() routines weak so they can be overridden Ard Biesheuvel
2018-09-04 9:44 ` Herbert Xu
2018-08-27 11:02 ` [PATCH 2/4] arm64: cpufeature: add feature for CRC32 instructions Ard Biesheuvel
2018-08-28 17:01 ` Will Deacon
2018-08-28 18:43 ` Ard Biesheuvel
2018-09-04 3:18 ` Herbert Xu
2018-09-04 9:38 ` Will Deacon [this message]
2018-09-04 9:44 ` Herbert Xu
2018-09-10 15:45 ` Catalin Marinas
2018-08-27 11:02 ` [PATCH 3/4] arm64/lib: add accelerated crc32 routines Ard Biesheuvel
2018-08-27 11:02 ` [PATCH 4/4] crypto: arm64/crc32 - remove PMULL based CRC32 driver Ard Biesheuvel
2018-09-04 5:21 ` Herbert Xu
2018-08-27 14:53 ` [PATCH 0/4] arm64: wire CRC32 instructions into core crc32 routines Theodore Y. Ts'o
2018-08-27 15:18 ` Ard Biesheuvel
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