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From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: Xu Zaibo <xuzaibo@huawei.com>
Cc: <herbert@gondor.apana.org.au>, <davem@davemloft.net>,
	<qianweili@huawei.com>, <tanghui20@huawei.com>,
	<forest.zhouchang@huawei.com>, <linuxarm@huawei.com>,
	<zhangwei375@huawei.com>, <shenyang39@huawei.com>,
	<yekai13@huawei.com>, <linux-crypto@vger.kernel.org>
Subject: Re: [PATCH 4/4] crypto: hisilicon/sec2 - Add pbuffer mode for SEC driver
Date: Wed, 26 Feb 2020 14:30:37 +0000	[thread overview]
Message-ID: <20200226143037.00007ab0@Huawei.com> (raw)
In-Reply-To: <1fa85493-0e56-745e-2f24-5a12c2fec496@huawei.com>

On Wed, 26 Feb 2020 19:18:51 +0800
Xu Zaibo <xuzaibo@huawei.com> wrote:

> Hi,
> On 2020/2/25 23:14, Jonathan Cameron wrote:
> > On Tue, 25 Feb 2020 11:16:52 +0800
> > Xu Zaibo <xuzaibo@huawei.com> wrote:
> >  
> >> Hi,
> >>
> >>
> >> On 2020/2/24 22:01, Jonathan Cameron wrote:  
> >>> On Thu, 20 Feb 2020 17:04:55 +0800
> >>> Zaibo Xu <xuzaibo@huawei.com> wrote:
> >>>   
> >>>  
> [...]
> >>>>    
> >>>> +static void sec_free_pbuf_resource(struct device *dev, struct sec_alg_res *res)
> >>>> +{
> >>>> +	if (res->pbuf)
> >>>> +		dma_free_coherent(dev, SEC_TOTAL_PBUF_SZ,
> >>>> +				  res->pbuf, res->pbuf_dma);
> >>>> +}
> >>>> +
> >>>> +/*
> >>>> + * To improve performance, pbuffer is used for
> >>>> + * small packets (< 576Bytes) as IOMMU translation using.
> >>>> + */
> >>>> +static int sec_alloc_pbuf_resource(struct device *dev, struct sec_alg_res *res)
> >>>> +{
> >>>> +	int pbuf_page_offset;
> >>>> +	int i, j, k;
> >>>> +
> >>>> +	res->pbuf = dma_alloc_coherent(dev, SEC_TOTAL_PBUF_SZ,
> >>>> +				&res->pbuf_dma, GFP_KERNEL);  
> >>> Would it make more sense perhaps to do this as a DMA pool and have
> >>> it expand on demand?  
> >> Since there exist all kinds of buffer length, I think dma_alloc_coherent
> >> may be better?  
> > As it currently stands we allocate a large buffer in one go but ensure
> > we only have a single dma map that occurs at startup.
> >
> > If we allocate every time (don't use pbuf) performance is hit by
> > the need to set up the page table entries and flush for every request.
> >
> > A dma pool with a fixed size element would at worst (for small messages)
> > mean you had to do a dma map / unmap every time 6 ish buffers.
> > This would only happen if you filled the whole queue.  Under normal operation
> > you will have a fairly steady number of buffers in use at a time, so mostly
> > it would be reusing buffers that were already mapped from a previous request.  
> Agree, dma pool may give a smaller range of mapped memory, which may 
> increase hits
> of IOMMU TLB.
> >
> > You could implement your own allocator on top of dma_alloc_coherent but it'll
> > probably be a messy and cost you more than using fixed size small elements.
> >
> > So a dmapool here would give you a mid point between using lots of memory
> > and never needing to map/unmap vs map/unmap every time.
> >  
> My concern is the spinlock of DMA pool, which adds an exclusion between 
> sending requests
> and receiving responses, since DMA blocks are allocated as sending and 
> freed at receiving.

Agreed.  That may be a bottleneck.  Not clear to me whether that would be a
significant issue or not.

Jonathan


> 
> Thanks,
> Zaibo
> 
> .
> >>>     
> >>>> +	if (!res->pbuf)
> >>>> +		return -ENOMEM;
> >>>> +
> >>>> +	/*
> >>>> +	 * SEC_PBUF_PKG contains data pbuf, iv and
> >>>> +	 * out_mac : <SEC_PBUF|SEC_IV|SEC_MAC>
> >>>> +	 * Every PAGE contains six SEC_PBUF_PKG
> >>>> +	 * The sec_qp_ctx contains QM_Q_DEPTH numbers of SEC_PBUF_PKG
> >>>> +	 * So we need SEC_PBUF_PAGE_NUM numbers of PAGE
> >>>> +	 * for the SEC_TOTAL_PBUF_SZ
> >>>> +	 */
> >>>> +	for (i = 0; i <= SEC_PBUF_PAGE_NUM; i++) {
> >>>> +		pbuf_page_offset = PAGE_SIZE * i;
> >>>> +		for (j = 0; j < SEC_PBUF_NUM; j++) {
> >>>> +			k = i * SEC_PBUF_NUM + j;
> >>>> +			if (k == QM_Q_DEPTH)
> >>>> +				break;
> >>>> +			res[k].pbuf = res->pbuf +
> >>>> +				j * SEC_PBUF_PKG + pbuf_page_offset;
> >>>> +			res[k].pbuf_dma = res->pbuf_dma +
> >>>> +				j * SEC_PBUF_PKG + pbuf_page_offset;
> >>>> +		}
> >>>> +	}
> >>>> +	return 0;
> >>>> +}
> >>>> +  
> [...]
> 



  reply	other threads:[~2020-02-26 14:30 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-20  9:04 [PATCH 0/4] crypto: hisilicon - Improve SEC performance Zaibo Xu
2020-02-20  9:04 ` [PATCH 1/4] crypto: hisilicon - Use one workqueue per qm instead of per qp Zaibo Xu
2020-02-20  9:04 ` [PATCH 2/4] crypto: hisilicon/sec2 - Add workqueue for SEC driver Zaibo Xu
2020-02-20  9:04 ` [PATCH 3/4] crypto: hisilicon/sec2 - Add iommu status check Zaibo Xu
2020-02-20  9:04 ` [PATCH 4/4] crypto: hisilicon/sec2 - Add pbuffer mode for SEC driver Zaibo Xu
2020-02-20  9:50   ` John Garry
2020-02-20 10:10     ` Xu Zaibo
2020-02-20 11:07       ` John Garry
2020-02-20 12:16         ` Xu Zaibo
2020-02-20 12:20           ` John Garry
2020-02-20 12:32             ` Xu Zaibo
2020-02-24 14:01   ` Jonathan Cameron
2020-02-25  3:16     ` Xu Zaibo
2020-02-25 15:14       ` Jonathan Cameron
2020-02-26 11:18         ` Xu Zaibo
2020-02-26 14:30           ` Jonathan Cameron [this message]
2020-02-27  1:13             ` Xu Zaibo

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