From: Ard Biesheuvel <ardb@kernel.org>
To: linux-crypto@vger.kernel.org
Cc: herbert@gondor.apana.org.au, Ard Biesheuvel <ardb@kernel.org>,
Nick Desaulniers <ndesaulniers@google.com>,
Stefan Agner <stefan@agner.ch>, Peter Smith <Peter.Smith@arm.com>
Subject: [PATCH v2 2/2] crypto: arm/sha512-neon - avoid ADRL pseudo instruction
Date: Wed, 16 Sep 2020 09:14:18 +0300 [thread overview]
Message-ID: <20200916061418.9197-3-ardb@kernel.org> (raw)
In-Reply-To: <20200916061418.9197-1-ardb@kernel.org>
The ADRL pseudo instruction is not an architectural construct, but a
convenience macro that was supported by the ARM proprietary assembler
and adopted by binutils GAS as well, but only when assembling in 32-bit
ARM mode. Therefore, it can only be used in assembler code that is known
to assemble in ARM mode only, but as it turns out, the Clang assembler
does not implement ADRL at all, and so it is better to get rid of it
entirely.
So replace the ADRL instruction with a ADR instruction that refers to
a nearer symbol, and apply the delta explicitly using an additional
instruction.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
arch/arm/crypto/sha512-armv4.pl | 4 ++--
arch/arm/crypto/sha512-core.S_shipped | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/crypto/sha512-armv4.pl b/arch/arm/crypto/sha512-armv4.pl
index 69df68981acd..2fc3516912fa 100644
--- a/arch/arm/crypto/sha512-armv4.pl
+++ b/arch/arm/crypto/sha512-armv4.pl
@@ -212,7 +212,6 @@ $code=<<___;
#else
.syntax unified
# ifdef __thumb2__
-# define adrl adr
.thumb
# else
.code 32
@@ -602,7 +601,8 @@ sha512_block_data_order_neon:
dmb @ errata #451034 on early Cortex A8
add $len,$inp,$len,lsl#7 @ len to point at the end of inp
VFP_ABI_PUSH
- adrl $Ktbl,K512
+ adr $Ktbl,.Lsha512_block_data_order
+ sub $Ktbl,$Ktbl,.Lsha512_block_data_order-K512
vldmia $ctx,{$A-$H} @ load context
.Loop_neon:
___
diff --git a/arch/arm/crypto/sha512-core.S_shipped b/arch/arm/crypto/sha512-core.S_shipped
index cb147db5cbfe..03014624f2ab 100644
--- a/arch/arm/crypto/sha512-core.S_shipped
+++ b/arch/arm/crypto/sha512-core.S_shipped
@@ -79,7 +79,6 @@
#else
.syntax unified
# ifdef __thumb2__
-# define adrl adr
.thumb
# else
.code 32
@@ -543,7 +542,8 @@ sha512_block_data_order_neon:
dmb @ errata #451034 on early Cortex A8
add r2,r1,r2,lsl#7 @ len to point at the end of inp
VFP_ABI_PUSH
- adrl r3,K512
+ adr r3,.Lsha512_block_data_order
+ sub r3,r3,.Lsha512_block_data_order-K512
vldmia r0,{d16-d23} @ load context
.Loop_neon:
vshr.u64 d24,d20,#14 @ 0
--
2.17.1
next prev parent reply other threads:[~2020-09-16 6:14 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-16 6:14 [PATCH v2 0/2] crypto: arm/sha-neon - avoid ADRL instructions Ard Biesheuvel
2020-09-16 6:14 ` [PATCH v2 1/2] crypto: arm/sha256-neon - avoid ADRL pseudo instruction Ard Biesheuvel
2020-09-16 6:14 ` Ard Biesheuvel [this message]
2020-09-17 0:53 ` [PATCH v2 0/2] crypto: arm/sha-neon - avoid ADRL instructions Nick Desaulniers
2020-09-17 6:08 ` Ard Biesheuvel
2020-09-18 20:08 ` Nick Desaulniers
2020-09-18 20:30 ` Ard Biesheuvel
2020-09-25 8:11 ` Herbert Xu
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