Re: [PATCH v3 2/2] crypto: mtk-eip93 - Add Mediatek EIP-93 crypto engine

kernel test robot
2021-10-28T05:13:25Z

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Hi Richard,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on herbert-cryptodev-2.6/master]
[also build test WARNING on herbert-crypto-2.6/master robh/for-next v5.15-rc7 next-20211027]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url: https://github.com/0day-ci/linux/commits/Richard-van-Schagen/Enable-the-Mediatek-EIP-93-crypto-engine/20211027-171429
base: https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git master
config: arm-randconfig-r001-20211027 (attached as .config)
compiler: arm-linux-gnueabi-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/b4ea2578718d77c7cbac42427a511182d91ac5f1
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Richard-van-Schagen/Enable-the-Mediatek-EIP-93-crypto-engine/20211027-171429
git checkout b4ea2578718d77c7cbac42427a511182d91ac5f1
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross ARCH=arm

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

>> drivers/crypto/mtk-eip93/eip93-common.c:282:6: warning: no previous prototype for 'mtk_set_saRecord' [-Wmissing-prototypes]
282 | void mtk_set_saRecord(struct saRecord_s *saRecord, const unsigned int keylen,
| ^~~~~~~~~~~~~~~~

vim +/mtk_set_saRecord +282 drivers/crypto/mtk-eip93/eip93-common.c

196
197 int check_valid_request(struct mtk_cipher_reqctx *rctx)
198 {
199 struct scatterlist *src = rctx->sg_src;
200 struct scatterlist *dst = rctx->sg_dst;
201 uint32_t src_nents, dst_nents;
202 u32 textsize = rctx->textsize;
203 u32 authsize = rctx->authsize;
204 u32 blksize = rctx->blksize;
205 u32 totlen_src = rctx->assoclen + rctx->textsize;
206 u32 totlen_dst = rctx->assoclen + rctx->textsize;
207 u32 copy_len;
208 bool src_align, dst_align;
209 int err = -EINVAL;
210
211 if (!IS_CTR(rctx->flags)) {
212 if (!IS_ALIGNED(textsize, blksize))
213 return err;
214 }
215
216 if (authsize) {
217 if (IS_ENCRYPT(rctx->flags))
218 totlen_dst += authsize;
219 else
220 totlen_src += authsize;
221 }
222
223 src_nents = sg_nents_for_len(src, totlen_src);
224 dst_nents = sg_nents_for_len(dst, totlen_dst);
225
226 if (src == dst) {
227 src_nents = max(src_nents, dst_nents);
228 dst_nents = src_nents;
229 if (unlikely((totlen_src || totlen_dst) && (src_nents <= 0)))
230 return err;
231
232 } else {
233 if (unlikely(totlen_src && (src_nents <= 0)))
234 return err;
235
236 if (unlikely(totlen_dst && (dst_nents <= 0)))
237 return err;
238 }
239
240 if (authsize) {
241 if (dst_nents == 1 && src_nents == 1) {
242 src_align = mtk_is_sg_aligned(src, totlen_src, blksize);
243 if (src == dst)
244 dst_align = src_align;
245 else
246 dst_align = mtk_is_sg_aligned(dst,
247 totlen_dst, blksize);
248 } else {
249 src_align = false;
250 dst_align = false;
251 }
252 } else {
253 src_align = mtk_is_sg_aligned(src, totlen_src, blksize);
254 if (src == dst)
255 dst_align = src_align;
256 else
257 dst_align = mtk_is_sg_aligned(dst, totlen_dst, blksize);
258 }
259
260 copy_len = max(totlen_src, totlen_dst);
261 if (!src_align) {
262 err = mtk_make_sg_copy(src, &rctx->sg_src, copy_len, true);
263 if (err)
264 return err;
265 }
266
267 if (!dst_align) {
268 err = mtk_make_sg_copy(dst, &rctx->sg_dst, copy_len, false);
269 if (err)
270 return err;
271 }
272
273 rctx->src_nents = sg_nents_for_len(rctx->sg_src, totlen_src);
274 rctx->dst_nents = sg_nents_for_len(rctx->sg_dst, totlen_dst);
275
276 return 0;
277 }
278 /*
279 * Set saRecord function:
280 * Even saRecord is set to "0", keep " = 0" for readability.
281 */
> 282 void mtk_set_saRecord(struct saRecord_s *saRecord, const unsigned int keylen,
283 const u32 flags)
284 {
285 saRecord->saCmd0.bits.ivSource = 2;
286 if (IS_ECB(flags))
287 saRecord->saCmd0.bits.saveIv = 0;
288 else
289 saRecord->saCmd0.bits.saveIv = 1;
290
291 saRecord->saCmd0.bits.opGroup = 0;
292 saRecord->saCmd0.bits.opCode = 0;
293
294 switch ((flags & MTK_ALG_MASK)) {
295 case MTK_ALG_AES:
296 saRecord->saCmd0.bits.cipher = 3;
297 saRecord->saCmd1.bits.aesKeyLen = keylen >> 3;
298 break;
299 case MTK_ALG_3DES:
300 saRecord->saCmd0.bits.cipher = 1;
301 break;
302 case MTK_ALG_DES:
303 saRecord->saCmd0.bits.cipher = 0;
304 break;
305 default:
306 saRecord->saCmd0.bits.cipher = 15;
307 }
308
309 switch ((flags & MTK_HASH_MASK)) {
310 case MTK_HASH_SHA256:
311 saRecord->saCmd0.bits.hash = 3;
312 break;
313 case MTK_HASH_SHA224:
314 saRecord->saCmd0.bits.hash = 2;
315 break;
316 case MTK_HASH_SHA1:
317 saRecord->saCmd0.bits.hash = 1;
318 break;
319 case MTK_HASH_MD5:
320 saRecord->saCmd0.bits.hash = 0;
321 break;
322 default:
323 saRecord->saCmd0.bits.hash = 15;
324 }
325
326 saRecord->saCmd0.bits.hdrProc = 0;
327 saRecord->saCmd0.bits.padType = 3;
328 saRecord->saCmd0.bits.extPad = 0;
329 saRecord->saCmd0.bits.scPad = 0;
330
331 switch ((flags & MTK_MODE_MASK)) {
332 case MTK_MODE_CBC:
333 saRecord->saCmd1.bits.cipherMode = 1;
334 break;
335 case MTK_MODE_CTR:
336 saRecord->saCmd1.bits.cipherMode = 2;
337 break;
338 case MTK_MODE_ECB:
339 saRecord->saCmd1.bits.cipherMode = 0;
340 break;
341 }
342
343 saRecord->saCmd1.bits.byteOffset = 0;
344 saRecord->saCmd1.bits.hashCryptOffset = 0;
345 saRecord->saCmd0.bits.digestLength = 0;
346 saRecord->saCmd1.bits.copyPayload = 0;
347
348 if (IS_HMAC(flags)) {
349 saRecord->saCmd1.bits.hmac = 1;
350 saRecord->saCmd1.bits.copyDigest = 1;
351 saRecord->saCmd1.bits.copyHeader = 1;
352 } else {
353 saRecord->saCmd1.bits.hmac = 0;
354 saRecord->saCmd1.bits.copyDigest = 0;
355 saRecord->saCmd1.bits.copyHeader = 0;
356 }
357
358 /* Default for now, might be used for ESP offload */
359 saRecord->saCmd1.bits.seqNumCheck = 0;
360 saRecord->saSpi = 0x0;
361 saRecord->saSeqNumMask[0] = 0xFFFFFFFF;
362 saRecord->saSeqNumMask[1] = 0x0;
363 }
364

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

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