Re: [PATCH v3 2/2] crypto: mtk-eip93 - Add Mediatek EIP-93 crypto engine

[kernel test robot <lkp@intel.com>]

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Hi Richard,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on herbert-cryptodev-2.6/master]
[also build test WARNING on herbert-crypto-2.6/master robh/for-next v5.15-rc7 next-20211027]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Richard-van-Schagen/Enable-the-Mediatek-EIP-93-crypto-engine/20211027-171429
base:   https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git master
config: arm64-randconfig-s031-20211027 (attached as .config)
compiler: aarch64-linux-gcc (GCC) 11.2.0
reproduce:
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # apt-get install sparse
        # sparse version: v0.6.4-dirty
        # https://github.com/0day-ci/linux/commit/b4ea2578718d77c7cbac42427a511182d91ac5f1
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Richard-van-Schagen/Enable-the-Mediatek-EIP-93-crypto-engine/20211027-171429
        git checkout b4ea2578718d77c7cbac42427a511182d91ac5f1
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' ARCH=arm64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>


sparse warnings: (new ones prefixed by >>)
>> drivers/crypto/mtk-eip93/eip93-common.c:551:37: sparse: sparse: incorrect type in assignment (different base types) @@     expected unsigned int @@     got restricted __be32 [usertype] @@
   drivers/crypto/mtk-eip93/eip93-common.c:551:37: sparse:     expected unsigned int
   drivers/crypto/mtk-eip93/eip93-common.c:551:37: sparse:     got restricted __be32 [usertype]
>> drivers/crypto/mtk-eip93/eip93-common.c:555:23: sparse: sparse: cast to restricted __be32
   drivers/crypto/mtk-eip93/eip93-common.c:658:43: sparse: sparse: cast to restricted __be32
>> drivers/crypto/mtk-eip93/eip93-common.c:527:14: sparse: sparse: non size-preserving pointer to integer cast
   drivers/crypto/mtk-eip93/eip93-common.c:593:31: sparse: sparse: non size-preserving pointer to integer cast

vim +551 drivers/crypto/mtk-eip93/eip93-common.c

   500	
   501	int mtk_send_req(struct crypto_async_request *async,
   502				const u8 *reqiv, struct mtk_cipher_reqctx *rctx)
   503	{
   504		struct mtk_crypto_ctx *ctx = crypto_tfm_ctx(async->tfm);
   505		struct mtk_device *mtk = ctx->mtk;
   506		struct scatterlist *src = rctx->sg_src;
   507		struct scatterlist *dst = rctx->sg_dst;
   508		struct saState_s *saState;
   509		struct mtk_state_pool *saState_pool;
   510		struct eip93_descriptor_s cdesc;
   511		u32 flags = rctx->flags;
   512		int idx;
   513		int offsetin = 0, err = -ENOMEM;
   514		u32 datalen = rctx->assoclen + rctx->textsize;
   515		u32 split = datalen;
   516		u32 start, end, ctr, blocks;
   517		u32 iv[AES_BLOCK_SIZE / sizeof(u32)];
   518	
   519		rctx->saState_ctr = NULL;
   520		rctx->saState = NULL;
   521	
   522		if (IS_ECB(flags))
   523			goto skip_iv;
   524	
   525		memcpy(iv, reqiv, rctx->ivsize);
   526	
 > 527		if (!IS_ALIGNED((u32)reqiv, rctx->ivsize) || IS_RFC3686(flags)) {
   528			rctx->flags &= ~MTK_DESC_DMA_IV;
   529			flags = rctx->flags;
   530		}
   531	
   532		if (IS_DMA_IV(flags)) {
   533			rctx->saState = (void *)reqiv;
   534		} else  {
   535			idx = mtk_get_free_saState(mtk);
   536			if (idx < 0)
   537				goto send_err;
   538			saState_pool = &mtk->ring->saState_pool[idx];
   539			rctx->saState_idx = idx;
   540			rctx->saState = saState_pool->base;
   541			rctx->saState_base = saState_pool->base_dma;
   542			memcpy(rctx->saState->stateIv, iv, rctx->ivsize);
   543		}
   544	
   545		saState = rctx->saState;
   546	
   547		if (IS_RFC3686(flags)) {
   548			saState->stateIv[0] = ctx->saNonce;
   549			saState->stateIv[1] = iv[0];
   550			saState->stateIv[2] = iv[1];
 > 551			saState->stateIv[3] = cpu_to_be32(1);
   552		} else if (!IS_HMAC(flags) && IS_CTR(flags)) {
   553			/* Compute data length. */
   554			blocks = DIV_ROUND_UP(rctx->textsize, AES_BLOCK_SIZE);
 > 555			ctr = be32_to_cpu(iv[3]);
   556			/* Check 32bit counter overflow. */
   557			start = ctr;
   558			end = start + blocks - 1;
   559			if (end < start) {
   560				split = AES_BLOCK_SIZE * -start;
   561				/*
   562				 * Increment the counter manually to cope with
   563				 * the hardware counter overflow.
   564				 */
   565				iv[3] = 0xffffffff;
   566				crypto_inc((u8 *)iv, AES_BLOCK_SIZE);
   567				idx = mtk_get_free_saState(mtk);
   568				if (idx < 0)
   569					goto free_state;
   570				saState_pool = &mtk->ring->saState_pool[idx];
   571				rctx->saState_ctr_idx = idx;
   572				rctx->saState_ctr = saState_pool->base;
   573				rctx->saState_base_ctr = saState_pool->base_dma;
   574	
   575				memcpy(rctx->saState_ctr->stateIv, reqiv, rctx->ivsize);
   576				memcpy(saState->stateIv, iv, rctx->ivsize);
   577			}
   578		}
   579	
   580		if (IS_DMA_IV(flags)) {
   581			rctx->saState_base = dma_map_single(mtk->dev, (void *)reqiv,
   582							rctx->ivsize, DMA_TO_DEVICE);
   583			if (dma_mapping_error(mtk->dev, rctx->saState_base))
   584				goto free_state;
   585		}
   586	skip_iv:
   587		cdesc.peCrtlStat.bits.hostReady = 1;
   588		cdesc.peCrtlStat.bits.prngMode = 0;
   589		cdesc.peCrtlStat.bits.hashFinal = 0;
   590		cdesc.peCrtlStat.bits.padCrtlStat = 0;
   591		cdesc.peCrtlStat.bits.peReady = 0;
   592		cdesc.saAddr = rctx->saRecord_base;
   593		cdesc.arc4Addr = (u32)async;
   594		if (ctx->type == MTK_ALG_TYPE_AEAD)
   595			cdesc.userId = MTK_DESC_AEAD;
   596		else
   597			cdesc.userId = MTK_DESC_SKCIPHER;
   598		rctx->cdesc = &cdesc;
   599	
   600		/* map DMA_BIDIRECTIONAL to invalidate cache on destination
   601		 * implies __dma_cache_wback_inv
   602		 */
   603		dma_map_sg(mtk->dev, dst, rctx->dst_nents, DMA_BIDIRECTIONAL);
   604		if (src != dst)
   605			dma_map_sg(mtk->dev, src, rctx->src_nents, DMA_TO_DEVICE);
   606	
   607		err = mtk_scatter_combine(mtk, rctx, datalen, split, offsetin);
   608	
   609		return err;
   610	
   611	free_state:
   612		if (rctx->saState) {
   613			saState_pool = &mtk->ring->saState_pool[rctx->saState_idx];
   614			saState_pool->in_use = false;
   615		}
   616	
   617		if (rctx->saState_ctr) {
   618			saState_pool = &mtk->ring->saState_pool[rctx->saState_ctr_idx];
   619			saState_pool->in_use = false;
   620		}
   621	send_err:
   622		return err;
   623	}
   624	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

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