From: Srujana Challa <schalla@marvell.com>
To: <herbert@gondor.apana.org.au>, <davem@davemloft.net>, <kuba@kernel.org>
Cc: <linux-crypto@vger.kernel.org>, <netdev@vger.kernel.org>,
<linux-doc@vger.kernel.org>, <bbrezillon@kernel.org>,
<arno@natisbad.org>, <pabeni@redhat.com>, <edumazet@google.com>,
<corbet@lwn.net>, <sgoutham@marvell.com>, <bbhushan2@marvell.com>,
<jerinj@marvell.com>, <sbhatta@marvell.com>, <hkelam@marvell.com>,
<lcherian@marvell.com>, <gakula@marvell.com>,
<ndabilpuram@marvell.com>, <schalla@marvell.com>
Subject: [PATCH net-next v1 00/10] Add Marvell CPT CN10KB/CN10KA B0 support
Date: Mon, 11 Dec 2023 12:49:03 +0530 [thread overview]
Message-ID: <20231211071913.151225-1-schalla@marvell.com> (raw)
Marvell OcteonTX2's next gen platform CN10KB/CN10KA B0
introduced changes in CPT SG input format(SGv2) to make
it compatibile with NIX SG input format, to support inline
IPsec in SG mode.
This patchset modifies the octeontx2 CPT driver code to
support SGv2 format for CN10KB/CN10KA B0. And also adds
code to configure newly introduced HW registers.
This patchset also implements SW workaround for couple of
HW erratas.
v1:
- Fixed sparse errors reported by kernel test robot.
Nithin Dabilpuram (2):
crypto/octeontx2: register error interrupts for inline cptlf
crypto: octeontx2: support setting ctx ilen for inline CPT LF
Srujana Challa (8):
crypto: octeontx2: remove CPT block reset
:crypto: octeontx2: add SGv2 support for CN10KB or CN10KA B0
crypto: octeontx2: add devlink option to set max_rxc_icb_cnt
crypto: octeontx2: add devlink option to set t106 mode
crypto: octeontx2: remove errata workaround for CN10KB or CN10KA B0
chip.
crypto: octeontx2: add LF reset on queue disable
octeontx2-af: update CPT inbound inline IPsec mailbox
crypto: octeontx2: add ctx_val workaround
Documentation/crypto/device_drivers/index.rst | 9 +
.../crypto/device_drivers/octeontx2.rst | 29 ++
Documentation/crypto/index.rst | 1 +
drivers/crypto/marvell/octeontx2/cn10k_cpt.c | 89 +++++-
drivers/crypto/marvell/octeontx2/cn10k_cpt.h | 27 ++
.../marvell/octeontx2/otx2_cpt_common.h | 68 +++-
.../marvell/octeontx2/otx2_cpt_devlink.c | 89 +++++-
.../marvell/octeontx2/otx2_cpt_hw_types.h | 9 +-
.../marvell/octeontx2/otx2_cpt_mbox_common.c | 26 ++
.../marvell/octeontx2/otx2_cpt_reqmgr.h | 295 ++++++++++++++++++
drivers/crypto/marvell/octeontx2/otx2_cptlf.c | 133 +++++---
drivers/crypto/marvell/octeontx2/otx2_cptlf.h | 104 ++++--
drivers/crypto/marvell/octeontx2/otx2_cptpf.h | 4 +
.../marvell/octeontx2/otx2_cptpf_main.c | 76 ++---
.../marvell/octeontx2/otx2_cptpf_mbox.c | 82 ++++-
.../marvell/octeontx2/otx2_cptpf_ucode.c | 49 +--
.../marvell/octeontx2/otx2_cptpf_ucode.h | 3 +-
drivers/crypto/marvell/octeontx2/otx2_cptvf.h | 2 +
.../marvell/octeontx2/otx2_cptvf_algs.c | 31 ++
.../marvell/octeontx2/otx2_cptvf_algs.h | 5 +
.../marvell/octeontx2/otx2_cptvf_main.c | 25 +-
.../marvell/octeontx2/otx2_cptvf_mbox.c | 28 ++
.../marvell/octeontx2/otx2_cptvf_reqmgr.c | 162 +---------
.../net/ethernet/marvell/octeontx2/af/rvu.h | 20 ++
.../ethernet/marvell/octeontx2/af/rvu_cpt.c | 14 +
.../ethernet/marvell/octeontx2/af/rvu_reg.h | 1 +
26 files changed, 1076 insertions(+), 305 deletions(-)
create mode 100644 Documentation/crypto/device_drivers/index.rst
create mode 100644 Documentation/crypto/device_drivers/octeontx2.rst
--
2.25.1
next reply other threads:[~2023-12-11 7:19 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-11 7:19 Srujana Challa [this message]
2023-12-11 7:19 ` [PATCH net-next v1 01/10] crypto: octeontx2: remove CPT block reset Srujana Challa
2023-12-11 7:19 ` [PATCH net-next v1 02/10] :crypto: octeontx2: add SGv2 support for CN10KB or CN10KA B0 Srujana Challa
2023-12-11 8:12 ` Kalesh Anakkur Purayil
2023-12-11 7:19 ` [PATCH net-next v1 03/10] crypto: octeontx2: add devlink option to set max_rxc_icb_cnt Srujana Challa
2023-12-11 7:19 ` [PATCH net-next v1 04/10] crypto: octeontx2: add devlink option to set t106 mode Srujana Challa
2023-12-11 7:19 ` [PATCH net-next v1 05/10] crypto: octeontx2: remove errata workaround for CN10KB or CN10KA B0 chip Srujana Challa
2023-12-11 7:19 ` [PATCH net-next v1 06/10] crypto: octeontx2: add LF reset on queue disable Srujana Challa
2023-12-11 7:19 ` [PATCH net-next v1 07/10] octeontx2-af: update CPT inbound inline IPsec mailbox Srujana Challa
2023-12-11 7:19 ` [PATCH net-next v1 08/10] crypto: octeontx2: add ctx_val workaround Srujana Challa
2023-12-11 7:19 ` [PATCH net-next v1 09/10] crypto/octeontx2: register error interrupts for inline cptlf Srujana Challa
2023-12-11 17:15 ` Simon Horman
2023-12-11 7:19 ` [PATCH net-next v1 10/10] crypto: octeontx2: support setting ctx ilen for inline CPT LF Srujana Challa
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20231211071913.151225-1-schalla@marvell.com \
--to=schalla@marvell.com \
--cc=arno@natisbad.org \
--cc=bbhushan2@marvell.com \
--cc=bbrezillon@kernel.org \
--cc=corbet@lwn.net \
--cc=davem@davemloft.net \
--cc=edumazet@google.com \
--cc=gakula@marvell.com \
--cc=herbert@gondor.apana.org.au \
--cc=hkelam@marvell.com \
--cc=jerinj@marvell.com \
--cc=kuba@kernel.org \
--cc=lcherian@marvell.com \
--cc=linux-crypto@vger.kernel.org \
--cc=linux-doc@vger.kernel.org \
--cc=ndabilpuram@marvell.com \
--cc=netdev@vger.kernel.org \
--cc=pabeni@redhat.com \
--cc=sbhatta@marvell.com \
--cc=sgoutham@marvell.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox