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Miller" , David Woodhouse , James Bottomley , linux-pci@vger.kernel.org, linux-cxl@vger.kernel.org, linux-coco@lists.linux.dev, keyrings@vger.kernel.org, linux-crypto@vger.kernel.org, linuxarm@huawei.com, David Box , "Li, Ming" , Ilpo Jarvinen , Alistair Francis , Wilfred Mallawa , Damien Le Moal , Alexey Kardashevskiy , Dhaval Giani , Gobikrishna Dhanuskodi , Peter Gonda , Jerome Glisse , Sean Christopherson , Alexander Graf , Samuel Ortiz , Jann Horn Subject: Re: [PATCH v2 08/18] PCI/CMA: Authenticate devices on enumeration Message-ID: <20240715220206.GV1482543@nvidia.com> References: <66901b646bd44_1a7742941d@dwillia2-xfh.jf.intel.com.notmuch> <202407151005.15C1D4C5E8@keescook> <20240715181252.GU1482543@nvidia.com> <66958850db394_8f74d2942b@dwillia2-xfh.jf.intel.com.notmuch> Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <66958850db394_8f74d2942b@dwillia2-xfh.jf.intel.com.notmuch> X-ClientProxiedBy: BLAP220CA0011.NAMP220.PROD.OUTLOOK.COM (2603:10b6:208:32c::16) To DM6PR12MB3849.namprd12.prod.outlook.com (2603:10b6:5:1c7::26) Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6PR12MB3849:EE_|SN7PR12MB6885:EE_ X-MS-Office365-Filtering-Correlation-Id: e8bf730a-f7bd-4bbd-f709-08dca519f8d4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|366016|376014|7416014; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?hgt+WTOc4qDtK/rl/O1vK30ezrmcjOkPcAtMFX26PLRm5746/QcUqpiIgTK1?= =?us-ascii?Q?FqhjX97Yo66igceHUsmy/fQtMa6UchslT6wT8xogKnI/TGAhDeEyZalckVti?= =?us-ascii?Q?aow/qTxI+GwvtmsRGTOLdfP8yqHfEyvQeijbBgywwWsBqZXnNxNyjc3b2qtM?= =?us-ascii?Q?HaxLeh3dygxCh85AH0USNmdt5pbZ+C7vY97MXEQTb/0V54369EpDXxKTD5S/?= =?us-ascii?Q?8HRHEwa6bgbvNsSucVMbU8SDrAcWHQrOw6vBIp58O7aD/bk5s2duGCHmRu0A?= =?us-ascii?Q?KGLkGEbqXqiNRPQyeKd4FQQDCf/e8tI8DHyFuFP7/4s8zRxT6mrP+ga/4z6x?= =?us-ascii?Q?R7KWsmo27Rh7m4kRJvQJ911YzYQ3hRWKuZtvGEKrzFnJcBgK8DRTrotoO1UF?= =?us-ascii?Q?x4f/JiKsiuDBPA4FsjfCRKfP08RxRfb2LwVxo/ghFBPsTcYjfKaedKvbLMwr?= =?us-ascii?Q?QRfpU4pN2HUcVgmWBYmItMC2+p21ZaFZQilB4maYLp/lGy6A5b3tIBWktQJs?= =?us-ascii?Q?hdYsij6nbskYUlwvCDecAPJQ3Q/R7rWjep9G+sMUP/ZdpWFPZHSAMczi4Rfz?= =?us-ascii?Q?OmZz+EFoUHY6j48/oGo9Bi0UdPe9feXvNknpah3nHtfn+Cc0eYH/ILz1cpXe?= =?us-ascii?Q?XdUABOlmUtOgmgBGzSl29Se6Z+nVbBAjdKM37xPMcLpzLZY/9sDe7ADpcl/X?= =?us-ascii?Q?mLejZUe8qaK6bQ4mt8dG84CAK6wl5IjxxZ0xaLRu6ImUP+kkVAHJRoajgc30?= =?us-ascii?Q?OCp/3vfyWYhC69p4HaKuzDoKypxd7qKg1iQ+8ipBqCpXdBR2WLc1h+FmJwJD?= =?us-ascii?Q?Sp6ub7GgQd1C9lPwqexPFuYRUxj25TQkTZNvvzjt0JFobdj+sx/zE2skHD0d?= =?us-ascii?Q?SRlGXMSpvBs9MQao6HcsmwwZ/BVC3613sTUDWuUI80Zw+8FlvR9ZkHzBQ5Wq?= =?us-ascii?Q?+9GcnJaQnnGXgAOLOybPSyoNNDI6zr4MP54kCcOJcOM/iBfcU8+G/srlavGJ?= =?us-ascii?Q?2ZaYxuJNlh+lEyp1pnucDS3eje/Tmo8qS7HYSozOaekjg3c0ULALHTeV70sf?= =?us-ascii?Q?4XE5YV6E0ffuHUKdciqIHKeZW+AsvRkmYfOGOf6IOCoEUJiYrhv65wXewExt?= =?us-ascii?Q?+qMPAA397D2QEeeIHWyKQE8dwmiQ0B8zmPgGcX1OgKDqcni1ip267wRxqueI?= =?us-ascii?Q?Lk8R3V8AhgJ7cgCeAZPV6c/g/NgBwhNXUtuQ7/m49WoWxZz3dl0mFK+QEcQf?= =?us-ascii?Q?KVr4BrtiJ1m1N9r9zFrz0eP1DA16b1vmJK+JVCIza6ahBaPhgmdKenGXcIba?= =?us-ascii?Q?LuVbqkZmzyZJZYLXSBrUAMMkU0JZfE3nW60tMPfmEGf59J0hi+u9tQY3iuiK?= =?us-ascii?Q?o/+YvovSm57iah4UudCbKBBY/lUEHV/6oVQkBf6clEVVqKmtquPq0rkL7fVG?= =?us-ascii?Q?uvx9njATgR6dOuTgv4Tlm7mbc+FEGYlX6Xl85At9KszFB9J9mxxStHiTA1sx?= =?us-ascii?Q?ek+Ix79D2fPumW5J8HQSqJitCDjDTzvKFTYibjlN2vSsDTlMCKR9rfgPw3LX?= =?us-ascii?Q?4fP1f1Pgu+0jZN847h/pJ4I7s8Cdbwf3PMnkLWJh?= X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: e8bf730a-f7bd-4bbd-f709-08dca519f8d4 X-MS-Exchange-CrossTenant-AuthSource: DM6PR12MB3849.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Jul 2024 22:03:34.9063 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: ESUs17BClhBRTcMVKVllsxgXGnqxsGx2GZb0+cDngHr+2iXx8l9EARWF//JMw8sT X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB6885 On Mon, Jul 15, 2024 at 01:36:32PM -0700, Dan Williams wrote: > Jason Gunthorpe wrote: > > On Mon, Jul 15, 2024 at 10:21:48AM -0700, Kees Cook wrote: > > > > > Anyway, following the threat model, it doesn't seem like half measures > > > make any sense. If the threat model is "we cannot trust bus members" and > > > authentication is being used to establish trust, then anything else must > > > be explicitly excluded. If this can only be done via the described > > > firewalling, then that really does seem to be the right choice. > > > > There is supposed to be a state machine here, devices start up at VM > > time 0 unable to DMA to secure guest memory under any conditions. This > > property must be enforced by the trusted platform. > > > > Further the trusted plaform is supposed to prevent "replacement" > > attacks, so once the VM says it trusts a device it cannot be replaced > > with something else. > > > > When the guest decides it would like the device to reach secure memory > > the trusted platform is part of making that happen. > > > > From a kernel and lifecycle perspective we need a bunch of new options > > for PCI devices that should be triggered after userspace has had a > > look at the device. > > > > - A device is just forbidden from anything using it > > - A device used only with untrusted memory > > - A device is usable with trusted memory > > > > IMHO this determination needs to be made before the device driver is > > bound. > > Yes, and it depends on the device. Some devices should be filtered > early, some devices need to be operated against untrusted memory just > to get to the point where they can complete the acceptance flow into the > TCB. Operating a device with both trusted and untrusted iommu configurations is complex to manage and depends on how the trusted iommu HW works. > The motivation for the security policy is "there is trusted memory to > protect". Absent trusted memory, the status quo for the device-driver > model applies. >From what I can see on some platforms/configurations if the device is trusted capable then it MUST only issue trusted DMA as that is the only IO translation that will work. Meaning the decision to operate a device as trusted or not really has to be done before any driver is probed and probably needs to involve the iommu layer to try and do something about this mess in some way. I have yet to see a complete plan for how these details should work :) And I only know in detail how the iommu works for one platform, not the others, so I don't know how prevalent these concerns are.. Jason