From: Rob Herring <robh@kernel.org>
To: "J. Neuschäfer" <j.ne@posteo.net>
Cc: devicetree@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
"Scott Wood" <oss@buserror.net>,
"Madhavan Srinivasan" <maddy@linux.ibm.com>,
"Michael Ellerman" <mpe@ellerman.id.au>,
"Nicholas Piggin" <npiggin@gmail.com>,
"Christophe Leroy" <christophe.leroy@csgroup.eu>,
"Naveen N Rao" <naveen@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Damien Le Moal" <dlemoal@kernel.org>,
"Niklas Cassel" <cassel@kernel.org>,
"Herbert Xu" <herbert@gondor.apana.org.au>,
"David S. Miller" <davem@davemloft.net>,
"Lee Jones" <lee@kernel.org>, "Vinod Koul" <vkoul@kernel.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"J. Neuschäfer" <j.neuschaefer@gmx.net>,
"Wim Van Sebroeck" <wim@linux-watchdog.org>,
"Guenter Roeck" <linux@roeck-us.net>,
"Mark Brown" <broonie@kernel.org>,
"Miquel Raynal" <miquel.raynal@bootlin.com>,
"Richard Weinberger" <richard@nod.at>,
"Vignesh Raghavendra" <vigneshr@ti.com>,
linux-kernel@vger.kernel.org, linux-ide@vger.kernel.org,
linux-crypto@vger.kernel.org, dmaengine@vger.kernel.org,
linux-pci@vger.kernel.org, linux-watchdog@vger.kernel.org,
linux-spi@vger.kernel.org, linux-mtd@lists.infradead.org
Subject: Re: [PATCH 5/9] dt-bindings: dma: Convert fsl,elo*-dma bindings to YAML
Date: Sun, 26 Jan 2025 22:47:35 -0600 [thread overview]
Message-ID: <20250127044735.GD3106458-robh@kernel.org> (raw)
In-Reply-To: <20250126-ppcyaml-v1-5-50649f51c3dd@posteo.net>
On Sun, Jan 26, 2025 at 07:59:00PM +0100, J. Neuschäfer wrote:
> The devicetree bindings for Freescale DMA engines have so far existed as
> a text file. This patch converts them to YAML, and specifies all the
> compatible strings currently in use in arch/powerpc/boot/dts.
>
> Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
> ---
> .../devicetree/bindings/dma/fsl,elo-dma.yaml | 129 +++++++++++++
> .../devicetree/bindings/dma/fsl,elo3-dma.yaml | 105 +++++++++++
> .../devicetree/bindings/dma/fsl,eloplus-dma.yaml | 120 ++++++++++++
> .../devicetree/bindings/powerpc/fsl/dma.txt | 204 ---------------------
> 4 files changed, 354 insertions(+), 204 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/dma/fsl,elo-dma.yaml b/Documentation/devicetree/bindings/dma/fsl,elo-dma.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..d1f4978a672c1217c322c27f243470b2de8c99d4
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/fsl,elo-dma.yaml
> @@ -0,0 +1,129 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/dma/fsl,elo-dma.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale Elo DMA Controller
> +
> +maintainers:
> + - J. Neuschäfer <j.ne@posteo.net>
> +
> +description: |
> + This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx
> + series chips such as mpc8315, mpc8349, mpc8379 etc.
> +
> + Note on DMA channel compatible properties: The compatible property must say
> + "fsl,elo-dma-channel" or "fsl,eloplus-dma-channel" to be used by the Elo DMA
> + driver (fsldma). Any DMA channel used by fsldma cannot be used by another
> + DMA driver, such as the SSI sound drivers for the MPC8610. Therefore, any
> + DMA channel that should be used for another driver should not use
> + "fsl,elo-dma-channel" or "fsl,eloplus-dma-channel". For the SSI drivers, for
> + example, the compatible property should be "fsl,ssi-dma-channel". See
> + ssi.txt for more information.
> +
> +properties:
> + compatible:
> + items:
> + - enum:
> + - fsl,mpc8313-dma
> + - fsl,mpc8315-dma
> + - fsl,mpc8323-dma
> + - fsl,mpc8347-dma
> + - fsl,mpc8349-dma
> + - fsl,mpc8360-dma
> + - fsl,mpc8377-dma
> + - fsl,mpc8378-dma
> + - fsl,mpc8379-dma
> + - const: fsl,elo-dma
> +
> + reg:
> + maxItems: 1
> + description:
> + DMA General Status Register, i.e. DGSR which contains status for
> + all the 4 DMA channels.
> +
> + ranges: true
> +
> + cell-index:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: Controller index. 0 for controller @ 0x8100.
> +
> + interrupts:
> + maxItems: 1
> +
> +patternProperties:
> + "^dma-channel@.*$":
> + type: object
additionalProperties: false
(The tools should have highlighted this)
> +
> + properties:
> + compatible:
> + items:
> + - enum:
> + - fsl,mpc8315-dma-channel
> + - fsl,mpc8323-dma-channel
> + - fsl,mpc8347-dma-channel
> + - fsl,mpc8349-dma-channel
> + - fsl,mpc8360-dma-channel
> + - fsl,mpc8377-dma-channel
> + - fsl,mpc8378-dma-channel
> + - fsl,mpc8379-dma-channel
> + - const: fsl,elo-dma-channel
> +
> + reg:
> + maxItems: 1
> +
> + cell-index:
> + description: DMA channel index starts at 0.
> +
> + interrupts: true
You have to define how many interrupts and what they are.
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> +
> +additionalProperties: true
> +
> +examples:
> + - |
> + dma@82a8 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
> + reg = <0x82a8 4>;
> + ranges = <0 0x8100 0x1a4>;
> + interrupt-parent = <&ipic>;
> + interrupts = <71 8>;
> + cell-index = <0>;
> + dma-channel@0 {
> + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
> + cell-index = <0>;
> + reg = <0 0x80>;
> + interrupt-parent = <&ipic>;
> + interrupts = <71 8>;
> + };
> + dma-channel@80 {
> + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
> + cell-index = <1>;
> + reg = <0x80 0x80>;
> + interrupt-parent = <&ipic>;
> + interrupts = <71 8>;
> + };
> + dma-channel@100 {
> + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
> + cell-index = <2>;
> + reg = <0x100 0x80>;
> + interrupt-parent = <&ipic>;
> + interrupts = <71 8>;
> + };
> + dma-channel@180 {
> + compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
> + cell-index = <3>;
> + reg = <0x180 0x80>;
> + interrupt-parent = <&ipic>;
> + interrupts = <71 8>;
> + };
> + };
> +
> +...
> diff --git a/Documentation/devicetree/bindings/dma/fsl,elo3-dma.yaml b/Documentation/devicetree/bindings/dma/fsl,elo3-dma.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..d4853ffd40dc75c7fcdc0dfb15e497ec56f3e1ba
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/fsl,elo3-dma.yaml
> @@ -0,0 +1,105 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/dma/fsl,elo3-dma.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale Elo3 DMA Controller
> +
> +maintainers:
> + - J. Neuschäfer <j.ne@posteo.net>
> +
> +description: |
> + DMA controller which has same function as EloPlus except that Elo3 has 8
> + channels while EloPlus has only 4, it is used in Freescale Txxx and Bxxx
> + series chips, such as t1040, t4240, b4860.
> +
> + Note on DMA channel compatible properties: The compatible property must say
> + "fsl,elo-dma-channel" or "fsl,eloplus-dma-channel" to be used by the Elo DMA
> + driver (fsldma). Any DMA channel used by fsldma cannot be used by another
> + DMA driver, such as the SSI sound drivers for the MPC8610. Therefore, any DMA
> + channel that should be used for another driver should not use
> + "fsl,elo-dma-channel" or "fsl,eloplus-dma-channel". For the SSI drivers, for
> + example, the compatible property should be "fsl,ssi-dma-channel". See ssi.txt
> + for more information.
> +
> +properties:
> + compatible:
> + const: fsl,elo3-dma
> +
> + reg:
> + maxItems: 2
> + description: |
> + contains two entries for DMA General Status Registers, i.e. DGSR0 which
> + includes status for channel 1~4, and DGSR1 for channel 5~8
> +
> + interrupts:
> + maxItems: 1
> +
> +patternProperties:
> + "^dma-channel@.*$":
> + type: object
additionalProperties: false
> +
> + properties:
> + compatible:
> + const: fsl,eloplus-dma-channel
> +
> + reg:
> + maxItems: 1
> +
> + interrupts: true
You have to define how many interrupts.
> +
> +examples:
> + - |
> + dma@100300 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "fsl,elo3-dma";
> + reg = <0x100300 0x4>,
> + <0x100600 0x4>;
> + ranges = <0x0 0x100100 0x500>;
> + dma-channel@0 {
> + compatible = "fsl,eloplus-dma-channel";
> + reg = <0x0 0x80>;
> + interrupts = <28 2 0 0>;
> + };
> + dma-channel@80 {
> + compatible = "fsl,eloplus-dma-channel";
> + reg = <0x80 0x80>;
> + interrupts = <29 2 0 0>;
> + };
> + dma-channel@100 {
> + compatible = "fsl,eloplus-dma-channel";
> + reg = <0x100 0x80>;
> + interrupts = <30 2 0 0>;
> + };
> + dma-channel@180 {
> + compatible = "fsl,eloplus-dma-channel";
> + reg = <0x180 0x80>;
> + interrupts = <31 2 0 0>;
> + };
> + dma-channel@300 {
> + compatible = "fsl,eloplus-dma-channel";
> + reg = <0x300 0x80>;
> + interrupts = <76 2 0 0>;
> + };
> + dma-channel@380 {
> + compatible = "fsl,eloplus-dma-channel";
> + reg = <0x380 0x80>;
> + interrupts = <77 2 0 0>;
> + };
> + dma-channel@400 {
> + compatible = "fsl,eloplus-dma-channel";
> + reg = <0x400 0x80>;
> + interrupts = <78 2 0 0>;
> + };
> + dma-channel@480 {
> + compatible = "fsl,eloplus-dma-channel";
> + reg = <0x480 0x80>;
> + interrupts = <79 2 0 0>;
> + };
> + };
> +
> +additionalProperties: true
> +
> +...
> diff --git a/Documentation/devicetree/bindings/dma/fsl,eloplus-dma.yaml b/Documentation/devicetree/bindings/dma/fsl,eloplus-dma.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..680d64332ddf4d6d68ee8c607ac71211a7e19e6e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/fsl,eloplus-dma.yaml
> @@ -0,0 +1,120 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/dma/fsl,eloplus-dma.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Freescale EloPlus DMA Controller
> +
> +maintainers:
> + - J. Neuschäfer <j.ne@posteo.net>
> +
> +description: |
> + This is a 4-channel DMA controller with extended addresses and chaining,
> + mainly used in Freescale mpc85xx/86xx, Pxxx and BSC series chips, such as
> + mpc8540, mpc8641 p4080, bsc9131 etc.
> +
> + Note on DMA channel compatible properties: The compatible property must say
> + "fsl,elo-dma-channel" or "fsl,eloplus-dma-channel" to be used by the Elo DMA
> + driver (fsldma). Any DMA channel used by fsldma cannot be used by another
> + DMA driver, such as the SSI sound drivers for the MPC8610. Therefore, any DMA
> + channel that should be used for another driver should not use
> + "fsl,elo-dma-channel" or "fsl,eloplus-dma-channel". For the SSI drivers, for
> + example, the compatible property should be "fsl,ssi-dma-channel". See ssi.txt
> + for more information.
> +
> +properties:
> + compatible:
> + oneOf:
> + - items:
> + - enum:
> + - fsl,mpc8540-dma
> + - fsl,mpc8541-dma
> + - fsl,mpc8548-dma
> + - fsl,mpc8555-dma
> + - fsl,mpc8560-dma
> + - fsl,mpc8572-dma
> + - fsl,mpc8641-dma
> + - const: fsl,eloplus-dma
> + - const: fsl,eloplus-dma
> +
> + reg:
> + maxItems: 1
> + description:
> + DMA General Status Register, i.e. DGSR which contains
> + status for all the 4 DMA channels
> +
> + cell-index:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: |
> + controller index. 0 for controller @ 0x21000, 1 for controller @ 0xc000
> +
> + interrupts:
> + maxItems: 1
> +
> +patternProperties:
> + "^dma-channel@.*$":
> + type: object
additionalProperties: false
> +
> + properties:
> + compatible:
> + items:
> + - enum:
> + - fsl,mpc8540-dma-channel
> + - fsl,mpc8541-dma-channel
> + - fsl,mpc8548-dma-channel
> + - fsl,mpc8555-dma-channel
> + - fsl,mpc8560-dma-channel
> + - fsl,mpc8572-dma-channel
> + - const: fsl,eloplus-dma-channel
> +
> + reg:
> + maxItems: 1
> +
> + cell-index:
> + description: DMA channel index starts at 0.
> +
> + interrupts: true
How many?
> +
> +examples:
> + - |
> + dma@21300 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
> + reg = <0x21300 4>;
> + ranges = <0 0x21100 0x200>;
> + cell-index = <0>;
> + dma-channel@0 {
> + compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
> + reg = <0 0x80>;
> + cell-index = <0>;
> + interrupt-parent = <&mpic>;
> + interrupts = <20 2>;
> + };
> + dma-channel@80 {
> + compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
> + reg = <0x80 0x80>;
> + cell-index = <1>;
> + interrupt-parent = <&mpic>;
> + interrupts = <21 2>;
> + };
> + dma-channel@100 {
> + compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
> + reg = <0x100 0x80>;
> + cell-index = <2>;
> + interrupt-parent = <&mpic>;
> + interrupts = <22 2>;
> + };
> + dma-channel@180 {
> + compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
> + reg = <0x180 0x80>;
> + cell-index = <3>;
> + interrupt-parent = <&mpic>;
> + interrupts = <23 2>;
> + };
> + };
> +
> +additionalProperties: true
> +
> +...
next prev parent reply other threads:[~2025-01-27 4:47 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-26 18:58 [PATCH 0/9] YAML conversion of several Freescale/PowerPC DT bindings J. Neuschäfer via B4 Relay
2025-01-26 18:58 ` [PATCH 1/9] dt-bindings: powerpc: Add binding for Freescale/NXP MPC83xx SoCs J. Neuschäfer via B4 Relay
2025-01-27 4:23 ` Rob Herring (Arm)
2025-01-26 18:58 ` [PATCH 2/9] dt-bindings: ata: Convert fsl,pq-sata binding to YAML J. Neuschäfer via B4 Relay
2025-01-26 23:22 ` Damien Le Moal
2025-01-31 12:23 ` J. Neuschäfer
2025-01-27 4:37 ` Rob Herring
2025-01-26 18:58 ` [PATCH 3/9] dt-bindings: crypto: Convert fsl,sec-2.0 " J. Neuschäfer via B4 Relay
2025-01-27 4:41 ` Rob Herring
2025-01-29 15:41 ` J. Neuschäfer
2025-01-26 18:58 ` [PATCH 4/9] dt-bindings: mfd: Convert fsl,mcu-mpc8349emitx " J. Neuschäfer via B4 Relay
2025-01-27 4:42 ` Rob Herring
2025-02-11 14:13 ` (subset) " Lee Jones
2025-01-26 18:59 ` [PATCH 5/9] dt-bindings: dma: Convert fsl,elo*-dma bindings " J. Neuschäfer via B4 Relay
2025-01-27 4:47 ` Rob Herring [this message]
2025-01-31 14:03 ` J. Neuschäfer
2025-01-31 22:16 ` Rob Herring
2025-02-04 18:19 ` J. Neuschäfer
2025-01-29 22:52 ` Frank Li
2025-02-04 21:47 ` J. Neuschäfer
2025-01-26 18:59 ` [PATCH 6/9] dt-bindings: pci: Add fsl,mpc83xx-pcie bindings J. Neuschäfer via B4 Relay
2025-01-27 4:50 ` Rob Herring
2025-02-04 23:31 ` J. Neuschäfer
2025-01-29 22:55 ` Frank Li
2025-02-04 23:34 ` J. Neuschäfer
2025-02-06 12:42 ` Mukesh Kumar Savaliya
2025-02-07 13:37 ` J. Neuschäfer
2025-01-26 18:59 ` [PATCH 7/9] dt-bindings: watchdog: Convert mpc8xxx-wdt binding to YAML J. Neuschäfer via B4 Relay
2025-01-27 4:51 ` Rob Herring
2025-01-26 18:59 ` [PATCH 8/9] dt-bindings: spi: Convert Freescale SPI bindings " J. Neuschäfer via B4 Relay
2025-01-27 5:09 ` Rob Herring
2025-02-05 14:29 ` J. Neuschäfer
2025-01-26 18:59 ` [PATCH RFC 9/9] dt-bindings: nand: Convert fsl,elbc " J. Neuschäfer via B4 Relay
2025-01-27 4:23 ` Rob Herring
2025-02-06 22:59 ` J. Neuschäfer
2025-01-27 8:37 ` Krzysztof Kozlowski
2025-02-06 22:30 ` J. Neuschäfer
2025-01-29 23:01 ` Frank Li
2025-02-06 22:59 ` J. Neuschäfer
2025-01-29 22:29 ` [PATCH 0/9] YAML conversion of several Freescale/PowerPC DT bindings Frank Li
2025-01-31 11:33 ` J. Neuschäfer
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