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Thu, 06 Nov 2025 03:34:22 -0800 (PST) From: Bartosz Golaszewski Subject: [PATCH v8 00/11] crypto/dmaengine: qce: introduce BAM locking and use DMA for register I/O Date: Thu, 06 Nov 2025 12:33:56 +0100 Message-Id: <20251106-qcom-qce-cmd-descr-v8-0-ecddca23ca26@linaro.org> Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAKSHDGkC/x2MOwqAMBAFryJbu5AoEfUqYqGbp27hLwERxLsbb AammHkoIigitdlDAZdG3bckdZ6RLMM2g9Unp8IUzlpT8in7mgCW1bNHlMDi0IzWTqhMQyk8Aia 9/2nXv+8HeBO+qmQAAAA= X-Change-ID: 20251103-qcom-qce-cmd-descr-c5e9b11fe609 To: Vinod Koul , Jonathan Corbet , Thara Gopinath , Herbert Xu , "David S. Miller" , Udit Tiwari , Daniel Perez-Zoghbi , Md Sadre Alam Cc: dmaengine@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-crypto@vger.kernel.org, Bartosz Golaszewski , Dmitry Baryshkov X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=6129; i=bartosz.golaszewski@linaro.org; h=from:subject:message-id; bh=VZT8DjBw0pDi2d80lXPUn2i9zyAtOd6ztqK1+017c7E=; b=owEBbQKS/ZANAwAKARGnLqAUcddyAcsmYgBpDIexFrYNzcmVKfajeDvFY8fI0d2v4+XCRF/Ja lmtImJLgYCJAjMEAAEKAB0WIQQWnetsC8PEYBPSx58Rpy6gFHHXcgUCaQyHsQAKCRARpy6gFHHX cn/eD/4to27edxvPrrlR+95XXl9OFo7b1gAf8AszSDyxSXOGIHcuH3wimg4DOy0NwQTRyyEyYS/ tkcl4o7Zruw7XyiNGfg4F6uobDs645hZbt/U57ZtVSgoBRjRHeKNVd2JexB4FyRbGYgu4yhrQRZ 6JATqN8QsaXjQpdljml4VL1ke9UyBrMESdPS45U2Yng2vq9y0zhs3TwjQYzXwv8rJKv1ofmwVAP L0lca3FsG1CuAl4IfuAsWakavOqFIVq8KKVWMbPumhFgtpBLrLNZRSYJOqpel0YBuR/i/rdRxqv Tzmmrh0Bw5PdJKRpkpyaR3DOT1OYa9cvkVNSulmt7ifFjL16IBrLPNtoe7VfiwJTThPg9T2Yx2x Cvf8LdFHFW2mT4J7/E85U+FH/aZ0QEeMX3k7yyf0tSD2IXV72WpXNf2+cDnoluJ5vhPrhlh53IM itlZUssCR6FRcIZe8JYQ343xcjSrP+2Pin/T4Mob0j1xKZSm/EeqDepxH/xeluBNp0J756SjnEB ZFk+IRxg81PaMfcFySbfZ2IzOxWlini9OXywAz64DnVvJGK/3lIFHL4MM6OvfkL+D084i8l7D4a hLpj01hTqlfV6+fpI/kVPU0CPzQXM9dkXnsEHz4YmWog2ZT5/Ez/dphiu1U4fyV1GCvFzbjoAme 1wIJNhM6SSO1ffA== X-Developer-Key: i=bartosz.golaszewski@linaro.org; a=openpgp; fpr=169DEB6C0BC3C46013D2C79F11A72EA01471D772 Currently the QCE crypto driver accesses the crypto engine registers directly via CPU. Trust Zone may perform crypto operations simultaneously resulting in a race condition. To remedy that, let's introduce generic LOCK/UNLOCK flags in the dma engine API that allow linux to request a DMA controller lock for the duration of the transaction. In the specific case of the BAM DMA this translates to sending command descriptors performing dummy writes with the relevant flags set. The BAM will then lock all other pipes not related to the current pipe group, and keep handling the current pipe only until it sees the the unlock bit. In order for the locking to work correctly, we also need to switch to using DMA for all register I/O. On top of this, the series contains some additional tweaks and refactoring. The goal of this is not to improve the performance but to prepare the driver for supporting decryption into secure buffers in the future. Tested with tcrypt.ko, kcapi and cryptsetup. Shout out to Daniel and Udit from Qualcomm for helping me out with some DMA issues we encountered. Merging strategy: either an Ack from Vinod or an immutable branch with the DMA changes for the crypto subsystem will work. Signed-off-by: Bartosz Golaszewski --- Changes in v8: - Rework the command descriptor logic and drop a lot of unneeded code - Use the physical address for BAM command descriptor access, not the mapped DMA address - Fix the problems with iommu faults on newer platforms - Generalize the LOCK/UNLOCK flags in dmaengine and reword the docs and commit messages - Make the BAM locking logic stricter in the DMA engine driver - Add some additional minor QCE driver refactoring changes to the series - Lots of small reworks and tweaks to rebase on current mainline and fix previous issues - Link to v7: https://lore.kernel.org/all/20250311-qce-cmd-descr-v7-0-db613f5d9c9f@linaro.org/ Changes in v7: - remove unused code: writing to multiple registers was not used in v6, neither were the functions for reading registers over BAM DMA- - remove - don't read the SW_VERSION register needlessly in the BAM driver, instead: encode the information on whether the IP supports BAM locking in device match data - shrink code where possible with logic modifications (for instance: change the implementation of qce_write() instead of replacing it everywhere with a new symbol) - remove duplicated error messages - rework commit messages - a lot of shuffling code around for easier review and a more streamlined series - Link to v6: https://lore.kernel.org/all/20250115103004.3350561-1-quic_mdalam@quicinc.com/ Changes in v6: - change "BAM" to "DMA" - Ensured this series is compilable with the current Linux-next tip of the tree (TOT). Changes in v5: - Added DMA_PREP_LOCK and DMA_PREP_UNLOCK flag support in separate patch - Removed DMA_PREP_LOCK & DMA_PREP_UNLOCK flag - Added FIELD_GET and GENMASK macro to extract major and minor version Changes in v4: - Added feature description and test hardware with test command - Fixed patch version numbering - Dropped dt-binding patch - Dropped device tree changes - Added BAM_SW_VERSION register read - Handled the error path for the api dma_map_resource() in probe - updated the commit messages for batter redability - Squash the change where qce_bam_acquire_lock() and qce_bam_release_lock() api got introduce to the change where the lock/unlock flag get introced - changed cover letter subject heading to "dmaengine: qcom: bam_dma: add cmd descriptor support" - Added the very initial post for BAM lock/unlock patch link as v1 to track this feature Changes in v3: - https://lore.kernel.org/lkml/183d4f5e-e00a-8ef6-a589-f5704bc83d4a@quicinc.com/ - Addressed all the comments from v2 - Added the dt-binding - Fix alignment issue - Removed type casting from qce_write_reg_dma() and qce_read_reg_dma() - Removed qce_bam_txn = dma->qce_bam_txn; line from qce_alloc_bam_txn() api and directly returning dma->qce_bam_txn Changes in v2: - https://lore.kernel.org/lkml/20231214114239.2635325-1-quic_mdalam@quicinc.com/ - Initial set of patches for cmd descriptor support - Add client driver to use BAM lock/unlock feature - Added register read/write via BAM in QCE Crypto driver to use BAM lock/unlock feature Signed-off-by: Bartosz Golaszewski --- Bartosz Golaszewski (11): dmaengine: Add DMA_PREP_LOCK/DMA_PREP_UNLOCK flags dmaengine: qcom: bam_dma: Extend the driver's device match data dmaengine: qcom: bam_dma: Add bam_pipe_lock flag support crypto: qce - Include algapi.h in the core.h header crypto: qce - Remove unused ignore_buf crypto: qce - Simplify arguments of devm_qce_dma_request() crypto: qce - Use existing devres APIs in devm_qce_dma_request() crypto: qce - Map crypto memory for DMA crypto: qce - Add BAM DMA support for crypto register I/O crypto: qce - Add support for BAM locking crypto: qce - Switch to using BAM DMA for crypto I/O Documentation/driver-api/dmaengine/provider.rst | 9 ++ drivers/crypto/qce/aead.c | 10 ++ drivers/crypto/qce/common.c | 39 ++++-- drivers/crypto/qce/core.c | 28 ++++- drivers/crypto/qce/core.h | 11 ++ drivers/crypto/qce/dma.c | 158 ++++++++++++++++++++---- drivers/crypto/qce/dma.h | 15 ++- drivers/crypto/qce/sha.c | 8 ++ drivers/crypto/qce/skcipher.c | 7 ++ drivers/dma/qcom/bam_dma.c | 64 ++++++++-- include/linux/dmaengine.h | 6 + 11 files changed, 304 insertions(+), 51 deletions(-) --- base-commit: f3dfcffe2756f05cbae80ffdaa0ddf951e08431a change-id: 20251103-qcom-qce-cmd-descr-c5e9b11fe609 Best regards, -- Bartosz Golaszewski