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Fri, 28 Nov 2025 03:44:11 -0800 (PST) From: Bartosz Golaszewski Subject: [PATCH v9 00/11] crypto/dmaengine: qce: introduce BAM locking and use DMA for register I/O Date: Fri, 28 Nov 2025 12:43:58 +0100 Message-Id: <20251128-qcom-qce-cmd-descr-v9-0-9a5f72b89722@linaro.org> Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAP6KKWkC/22NQQqDMBBFryKz7pQkomhXvUdxYSejDlTTTkpoE e/eVOiui/nwPvw3K0RW4QinYgXlJFHCkqE9FEBTv4yM4jODM66y1pT4oDDnYKTZo+dIilRxe7V 24Nq0kId35UFeu/TSZZ4kPoO+9x+p+bY/Xf1Plxo0yOQ99a7MV59vsvQajkFH6LZt+wC+FHF4t QAAAA== X-Change-ID: 20251103-qcom-qce-cmd-descr-c5e9b11fe609 To: Vinod Koul , Jonathan Corbet , Thara Gopinath , Herbert Xu , "David S. Miller" , Udit Tiwari , Daniel Perez-Zoghbi , Md Sadre Alam , Dmitry Baryshkov Cc: dmaengine@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-crypto@vger.kernel.org, Bartosz Golaszewski X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=6263; i=bartosz.golaszewski@linaro.org; h=from:subject:message-id; bh=4khc6stX0k+SR3+8DlSRY+DGyoru5P/CEeBIvZI1qlw=; b=owEBbQKS/ZANAwAKAQWdLsv/NoTDAcsmYgBpKYsCXvc+JuhAbpBmEvwsMaL3pa0+mw9pTOsdx 5xLRp7TzNOJAjMEAAEKAB0WIQSR5RMt5bVGHXuiZfwFnS7L/zaEwwUCaSmLAgAKCRAFnS7L/zaE wzXiD/sF+q0Zkhqo+RZHB8+evczRi1o5+PSLZIlVbVC7vozr2EQiQNmasfjJcH3b3kYJ+5AVq+E WcXPUNB6rO6lDjEpH0GhlSz8SJ5Mi9FmqPxeWOyoRdjARH9Xm9IECH25N8rAGEgxwPZQ508WY8z jwkSYLWptuJ5J5vEYyuXRzXhpBwbmr3JVzfznySnPRvnDNsHLcZGXvQOqSBH3mlFrZpvr22BJ1/ z2nieGUujUqd8mMu0KPkOGZTOTU4aBd8WNnb2WtTCwKN5ziuW5ScRGlGZZRFZP8MM2DbeTAXLWB cLYbEgrH954Kaq1wcBFUw5/+PJuNCmztR8MoWgaCOvHayBVbsa9M0K6vYLFxbN3Zx36NEbK+5Fi mgS63q24oMAgbKAWFFnZAIJWDLLEBtW9qJ5csP2V/RzKjkVpSBzv6dUlUDIgF9lZO5clUKTub14 GlVVDgp+idXmO5dQ/1olfRBWpPQFsJcussCUgnOt0EsegiHsOONOt8ppUigPz+IeH9IclxZhoxi 2PPN5RYOZYhcaKgpxQ1r3mEZqPvDdS3kz0d/xJME9ePIjD42elMlJt1OKCvlT5tNtI49EvFG5oz c0vEfn04kp0KDaN6Z/aQBa03ORLkqz6zv5XCX6bkMumsXhM9rFrTTA2yzUzT+We8J0bG2LppLj7 4Tbih7VOBCZwHaA== X-Developer-Key: i=bartosz.golaszewski@linaro.org; a=openpgp; fpr=169DEB6C0BC3C46013D2C79F11A72EA01471D772 Currently the QCE crypto driver accesses the crypto engine registers directly via CPU. Trust Zone may perform crypto operations simultaneously resulting in a race condition. To remedy that, let's introduce support for BAM locking/unlocking using DMA descriptor metadata as medium for passing the relevant information from the QCE engine driver to the BAM driver. In the specific case of the BAM DMA this translates to sending command descriptors performing dummy writes with the relevant flags set. The BAM will then lock all other pipes not related to the current pipe group, and keep handling the current pipe only until it sees the the unlock bit. In order for the locking to work correctly, we also need to switch to using DMA for all register I/O. On top of this, the series contains some additional tweaks and refactoring. The goal of this is not to improve the performance but to prepare the driver for supporting decryption into secure buffers in the future. Tested with tcrypt.ko, kcapi and cryptsetup. Shout out to Daniel and Udit from Qualcomm for helping me out with some DMA issues we encountered. Merging strategy: either an Ack from Vinod or an immutable branch with the DMA changes for the crypto subsystem will work. Signed-off-by: Bartosz Golaszewski --- Changes in v9: - Drop the global, generic LOCK/UNLOCK flags and instead use DMA descriptor metadata ops to pass BAM-specific information from the QCE to the DMA engine - Link to v8: https://lore.kernel.org/r/20251106-qcom-qce-cmd-descr-v8-0-ecddca23ca26@linaro.org Changes in v8: - Rework the command descriptor logic and drop a lot of unneeded code - Use the physical address for BAM command descriptor access, not the mapped DMA address - Fix the problems with iommu faults on newer platforms - Generalize the LOCK/UNLOCK flags in dmaengine and reword the docs and commit messages - Make the BAM locking logic stricter in the DMA engine driver - Add some additional minor QCE driver refactoring changes to the series - Lots of small reworks and tweaks to rebase on current mainline and fix previous issues - Link to v7: https://lore.kernel.org/all/20250311-qce-cmd-descr-v7-0-db613f5d9c9f@linaro.org/ Changes in v7: - remove unused code: writing to multiple registers was not used in v6, neither were the functions for reading registers over BAM DMA- - remove - don't read the SW_VERSION register needlessly in the BAM driver, instead: encode the information on whether the IP supports BAM locking in device match data - shrink code where possible with logic modifications (for instance: change the implementation of qce_write() instead of replacing it everywhere with a new symbol) - remove duplicated error messages - rework commit messages - a lot of shuffling code around for easier review and a more streamlined series - Link to v6: https://lore.kernel.org/all/20250115103004.3350561-1-quic_mdalam@quicinc.com/ Changes in v6: - change "BAM" to "DMA" - Ensured this series is compilable with the current Linux-next tip of the tree (TOT). Changes in v5: - Added DMA_PREP_LOCK and DMA_PREP_UNLOCK flag support in separate patch - Removed DMA_PREP_LOCK & DMA_PREP_UNLOCK flag - Added FIELD_GET and GENMASK macro to extract major and minor version Changes in v4: - Added feature description and test hardware with test command - Fixed patch version numbering - Dropped dt-binding patch - Dropped device tree changes - Added BAM_SW_VERSION register read - Handled the error path for the api dma_map_resource() in probe - updated the commit messages for batter redability - Squash the change where qce_bam_acquire_lock() and qce_bam_release_lock() api got introduce to the change where the lock/unlock flag get introced - changed cover letter subject heading to "dmaengine: qcom: bam_dma: add cmd descriptor support" - Added the very initial post for BAM lock/unlock patch link as v1 to track this feature Changes in v3: - https://lore.kernel.org/lkml/183d4f5e-e00a-8ef6-a589-f5704bc83d4a@quicinc.com/ - Addressed all the comments from v2 - Added the dt-binding - Fix alignment issue - Removed type casting from qce_write_reg_dma() and qce_read_reg_dma() - Removed qce_bam_txn = dma->qce_bam_txn; line from qce_alloc_bam_txn() api and directly returning dma->qce_bam_txn Changes in v2: - https://lore.kernel.org/lkml/20231214114239.2635325-1-quic_mdalam@quicinc.com/ - Initial set of patches for cmd descriptor support - Add client driver to use BAM lock/unlock feature - Added register read/write via BAM in QCE Crypto driver to use BAM lock/unlock feature Signed-off-by: Bartosz Golaszewski --- Bartosz Golaszewski (11): dmaengine: qcom: bam_dma: Extend the driver's device match data dmaengine: qcom: bam_dma: Add bam_pipe_lock flag support dmaengine: qcom: bam_dma: implement support for BAM locking crypto: qce - Include algapi.h in the core.h header crypto: qce - Remove unused ignore_buf crypto: qce - Simplify arguments of devm_qce_dma_request() crypto: qce - Use existing devres APIs in devm_qce_dma_request() crypto: qce - Map crypto memory for DMA crypto: qce - Add BAM DMA support for crypto register I/O crypto: qce - Add support for BAM locking crypto: qce - Switch to using BAM DMA for crypto I/O drivers/crypto/qce/aead.c | 10 +++ drivers/crypto/qce/common.c | 39 ++++++--- drivers/crypto/qce/core.c | 28 ++++++- drivers/crypto/qce/core.h | 11 +++ drivers/crypto/qce/dma.c | 176 ++++++++++++++++++++++++++++++++------- drivers/crypto/qce/dma.h | 15 +++- drivers/crypto/qce/sha.c | 8 ++ drivers/crypto/qce/skcipher.c | 7 ++ drivers/dma/qcom/bam_dma.c | 92 ++++++++++++++++++-- include/linux/dma/qcom_bam_dma.h | 12 +++ 10 files changed, 345 insertions(+), 53 deletions(-) --- base-commit: 60ce1919ad707c77df15449238bcb665020ffc93 change-id: 20251103-qcom-qce-cmd-descr-c5e9b11fe609 Best regards, -- Bartosz Golaszewski