[PATCH 4/6] firmware: xilinx: Add firmware API's to support sha3-384 in Versal device

Harsh Jain
2026-03-03T07:20:50Z

From: Mounika Botcha <mounika.botcha@amd.com>

Add sha3-384 crypto API's for AMD/Xilinx Versal device.

Signed-off-by: Mounika Botcha <mounika.botcha@amd.com>
Signed-off-by: Harsh Jain <h.jain@amd.com>
---
drivers/firmware/xilinx/zynqmp-crypto.c | 24 +++++++++++++++++++++
include/linux/firmware/xlnx-zynqmp-crypto.h | 8 +++++++
2 files changed, 32 insertions(+)

diff --git a/drivers/firmware/xilinx/zynqmp-crypto.c b/drivers/firmware/xilinx/zynqmp-crypto.c
index f06f1e2f67b8..caa3ee8c6e2a 100644
--- a/drivers/firmware/xilinx/zynqmp-crypto.c
+++ b/drivers/firmware/xilinx/zynqmp-crypto.c
@@ -236,3 +236,27 @@ int versal_pm_aes_init(void)
return zynqmp_pm_invoke_fn(XSECURE_API_AES_INIT, NULL, 0);
}
EXPORT_SYMBOL_GPL(versal_pm_aes_init);
+
+/**
+ * versal_pm_sha_hash - Access the SHA engine to calculate the hash
+ * @src: Address of the data
+ * @dst: Address of the output buffer
+ * @size: Size of the data.
+ * @out_status: Returned output value
+ *
+ * Return: Returns status, either success or error code.
+ */
+int versal_pm_sha_hash(const u64 src, const u64 dst, const u32 size, u32 *out_status)
+{
+ u32 ret_payload[PAYLOAD_ARG_CNT];
+ int ret;
+
+ if (!out_status)
+ return -EINVAL;
+ ret = zynqmp_pm_invoke_fn(XSECURE_API_SHA3_UPDATE, ret_payload, 5,
+ lower_32_bits(src), upper_32_bits(src),
+ size, lower_32_bits(dst), upper_32_bits(dst));
+ *out_status = ret_payload[0];
+ return ret;
+}
+EXPORT_SYMBOL_GPL(versal_pm_sha_hash);
diff --git a/include/linux/firmware/xlnx-zynqmp-crypto.h b/include/linux/firmware/xlnx-zynqmp-crypto.h
index 56595ab37c43..c93b77a2c084 100644
--- a/include/linux/firmware/xlnx-zynqmp-crypto.h
+++ b/include/linux/firmware/xlnx-zynqmp-crypto.h
@@ -33,6 +33,8 @@ struct xlnx_feature {
#define XSECURE_API_AES_KEY_ZERO 0x510
#define XSECURE_API_AES_WRITE_KEY 0x511

+#define XSECURE_API_SHA3_UPDATE 0x504
+
#if IS_REACHABLE(CONFIG_ZYNQMP_FIRMWARE)
int zynqmp_pm_aes_engine(const u64 address, u32 *out);
int zynqmp_pm_sha_hash(const u64 address, const u32 size, const u32 flags);
@@ -47,6 +49,7 @@ int versal_pm_aes_dec_update(const u64 in_params, const u64 in_addr);
int versal_pm_aes_dec_final(const u64 gcm_addr);
int versal_pm_aes_enc_final(const u64 gcm_addr);
int versal_pm_aes_init(void);
+int versal_pm_sha_hash(const u64 src, const u64 dst, const u32 size, u32 *out_status);

#else
static inline int zynqmp_pm_aes_engine(const u64 address, u32 *out)
@@ -114,6 +117,11 @@ static inline int versal_pm_aes_init(void)
return -ENODEV;
}

+static inline int versal_pm_sha_hash(const u64 src, const u64 dst, const u32 size, u32 *out_status)
+{
+ return -ENODEV;
+}
+
#endif

#endif /* __FIRMWARE_XLNX_ZYNQMP_CRYPTO_H__ */
--
2.34.1