From: Harsh Jain <h.jain@amd.com>
To: <herbert@gondor.apana.org.au>, <davem@davemloft.net>,
<linux-crypto@vger.kernel.org>, <mounika.botcha@amd.com>,
<sarat.chand.savitala@amd.com>, <michal.simek@amd.com>
Cc: Harsh Jain <h.jain@amd.com>
Subject: [PATCH 5/6] crypto: zynqmp-sha: Save dma bit mask value in driver context
Date: Tue, 3 Mar 2026 12:49:52 +0530 [thread overview]
Message-ID: <20260303071953.149252-6-h.jain@amd.com> (raw)
In-Reply-To: <20260303071953.149252-1-h.jain@amd.com>
Save dma mask in driver context. It will allow upcoming Versal sha3-384 to
use different value.
Signed-off-by: Harsh Jain <h.jain@amd.com>
---
drivers/crypto/xilinx/zynqmp-sha.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/crypto/xilinx/zynqmp-sha.c b/drivers/crypto/xilinx/zynqmp-sha.c
index 74e95df5eefc..72b405758200 100644
--- a/drivers/crypto/xilinx/zynqmp-sha.c
+++ b/drivers/crypto/xilinx/zynqmp-sha.c
@@ -31,6 +31,7 @@ struct xilinx_sha_drv_ctx {
struct ahash_engine_alg sha3_384;
struct crypto_engine *engine;
struct device *dev;
+ u8 dma_addr_size;
};
struct xilinx_sha_tfm_ctx {
@@ -248,6 +249,7 @@ static struct xilinx_sha_drv_ctx zynqmp_sha3_drv_ctx = {
.sha3_384.op = {
.do_one_request = handle_zynqmp_sha_engine_req,
},
+ .dma_addr_size = ZYNQMP_DMA_BIT_MASK,
};
@@ -273,7 +275,7 @@ static int zynqmp_sha_probe(struct platform_device *pdev)
return PTR_ERR(sha3_drv_ctx);
}
- err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(ZYNQMP_DMA_BIT_MASK));
+ err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(sha3_drv_ctx->dma_addr_size));
if (err < 0) {
dev_err(dev, "No usable DMA configuration\n");
return err;
--
2.34.1
next prev parent reply other threads:[~2026-03-03 7:20 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-03 7:19 [PATCH 0/6] crypto: zynqmp-aes-gcm: Bug fixes and sha3-384 support Harsh Jain
2026-03-03 7:19 ` [PATCH 1/6] crypto: xilinx: zynamp-sha: Update the driver to make it as self discoverable Harsh Jain
2026-03-03 7:19 ` [PATCH 2/6] crypto: zynqmp-sha: Change algo type from shash to ahash Harsh Jain
2026-03-14 4:43 ` Herbert Xu
2026-03-14 4:46 ` Herbert Xu
2026-03-03 7:19 ` [PATCH 3/6] crypto: zynqmp-sha: Replace zynqmp prefix with xilinx Harsh Jain
2026-03-03 7:19 ` [PATCH 4/6] firmware: xilinx: Add firmware API's to support sha3-384 in Versal device Harsh Jain
2026-03-03 7:19 ` Harsh Jain [this message]
2026-03-03 7:19 ` [PATCH 6/6] crypto: zynqmp-sha: Add sha3-384 support for AMD/Xilinx " Harsh Jain
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