From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D853030C179; Tue, 28 Jul 2026 02:19:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785205160; cv=none; b=B7lPaLnIwai2x31D00NKDFo6nzzKT3JfDDto0CTxCdAA01tu79emt+3M2WecbjQET/UerE1peSh6xTSmbY8nfi3ePePf2sKY56l8FgNHrpBtWHvnWvJGcXlwOVP5hizH6hbdWP/gwg0euSTm1RkvuKqYNbs8a0Leq2QH3/r6EFQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1785205160; c=relaxed/simple; bh=0SBzwjlOfW3pGB19D53GEbej2aY/V5zelSTdx+iCE0s=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=q/5zZYjDo7Dohys7e4SsSCaMhmX5pGWTLgFnaJl+ORx4k+Mi9t6mKtQMpqxbmyin2djDDOUD+PIiYk8xL4EAJdxg037ClXdbA1lTNDZfiNRUhsjD7t7IBCDSbFXn7xJO3xfweMf201iiqsA/uAeOGsauYvZDj/Y68BaBxTNiJZQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=lf3Kb7s7; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="lf3Kb7s7" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 89EC01F00ACA; Tue, 28 Jul 2026 02:19:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1785205158; bh=vqunIx6I6P5BO4L84jXf9HBRjWQOIObJRsDL1K0ccjI=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=lf3Kb7s7ERyjF5IypfY0T9KLnfwe00i8m6zFnFXSc2YteyQ+ZWv1B503sLgxDqNRe Er+zJqLF15HSIAqm5CKZzMQaUw4x0SntnpffzWVoin+W7jxxbRy2Ewh75jnOWIbdzI TO1wFFuesF/XqTR7+XyDWhemQwfCwV9a/MCxKc3zzAw1zJWoDp65aooOlMhlfrSDPG VxvuX5nFVBhcBcyHLZ93jSpbQQX1Ncun4To56Q2jpz+9d1DyLdxVFgDvlDxODYnHY2 GIfnhjz18j1AYvkpQbyJbo65GiBCaQKV1naRbqFy8LTbsbOwvgnh968h+9Ws019VCW ln9b9V1LePxbw== From: Eric Biggers To: x86@kernel.org Cc: linux-um@lists.infradead.org, linux-raid@vger.kernel.org, linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org, Christoph Hellwig , Andrew Morton , Eric Biggers Subject: [PATCH v2 6/8] x86/fpu: Remove cpu_has_xfeatures() Date: Mon, 27 Jul 2026 19:16:01 -0700 Message-ID: <20260728021603.79870-7-ebiggers@kernel.org> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260728021603.79870-1-ebiggers@kernel.org> References: <20260728021603.79870-1-ebiggers@kernel.org> Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The only remaining caller of cpu_has_xfeatures() is print_xstate_features(), which uses it only to check and get the name of a single feature. Remove it and just inline the needed code into print_xstate_features(). This also makes the "unknown xstate feature" entry at index XFEATURE_MAX of xfeature_names[] unnecessary, so remove that too. Signed-off-by: Eric Biggers --- arch/x86/include/asm/fpu/api.h | 9 ------- arch/x86/kernel/fpu/xstate.c | 44 +++------------------------------- 2 files changed, 3 insertions(+), 50 deletions(-) diff --git a/arch/x86/include/asm/fpu/api.h b/arch/x86/include/asm/fpu/api.h index 90c63fe19c0fb..cfed8b24d64f0 100644 --- a/arch/x86/include/asm/fpu/api.h +++ b/arch/x86/include/asm/fpu/api.h @@ -99,15 +99,6 @@ static inline void fpregs_assert_state_consistent(void) { } */ extern void switch_fpu_return(void); -/* - * Query the presence of one or more xfeatures. Works on any legacy CPU as well. - * - * If 'feature_name' is set then put a human-readable description of - * the feature there as well - this can be used to print error (or success) - * messages. - */ -extern int cpu_has_xfeatures(u64 xfeatures_mask, const char **feature_name); - /* Trap handling */ extern int fpu__exception_code(struct fpu *fpu, int trap_nr); extern void fpu_sync_fpstate(struct fpu *fpu); diff --git a/arch/x86/kernel/fpu/xstate.c b/arch/x86/kernel/fpu/xstate.c index 904ff933c0d88..3c185b2828c71 100644 --- a/arch/x86/kernel/fpu/xstate.c +++ b/arch/x86/kernel/fpu/xstate.c @@ -66,8 +66,8 @@ static const char *xfeature_names[] = "AMX Tile config", "AMX Tile data", "APX registers", - "unknown xstate feature", }; +static_assert(ARRAY_SIZE(xfeature_names) == XFEATURE_MAX); static unsigned short xsave_cpuid_features[] __initdata = { [XFEATURE_FP] = X86_FEATURE_FPU, @@ -122,44 +122,6 @@ static inline unsigned int next_xfeature_order(unsigned int i, u64 mask) #define XSTATE_FLAG_SUPERVISOR BIT(0) #define XSTATE_FLAG_ALIGNED64 BIT(1) -/* - * Return whether the system supports a given xfeature. - * - * Also return the name of the (most advanced) feature that the caller requested: - */ -int cpu_has_xfeatures(u64 xfeatures_needed, const char **feature_name) -{ - u64 xfeatures_missing = xfeatures_needed & ~fpu_kernel_cfg.max_features; - - if (unlikely(feature_name)) { - long xfeature_idx, max_idx; - u64 xfeatures_print; - /* - * So we use FLS here to be able to print the most advanced - * feature that was requested but is missing. So if a driver - * asks about "XFEATURE_MASK_SSE | XFEATURE_MASK_YMM" we'll print the - * missing AVX feature - this is the most informative message - * to users: - */ - if (xfeatures_missing) - xfeatures_print = xfeatures_missing; - else - xfeatures_print = xfeatures_needed; - - xfeature_idx = fls64(xfeatures_print)-1; - max_idx = ARRAY_SIZE(xfeature_names)-1; - xfeature_idx = min(xfeature_idx, max_idx); - - *feature_name = xfeature_names[xfeature_idx]; - } - - if (xfeatures_missing) - return 0; - - return 1; -} -EXPORT_SYMBOL_GPL(cpu_has_xfeatures); - static bool xfeature_is_aligned64(int xfeature_nr) { return xstate_flags[xfeature_nr] & XSTATE_FLAG_ALIGNED64; @@ -302,9 +264,9 @@ static void __init print_xstate_features(void) for (i = 0; i < XFEATURE_MAX; i++) { u64 mask = BIT_ULL(i); - const char *name; + const char *name = xfeature_names[i]; - if (cpu_has_xfeatures(mask, &name)) + if (fpu_kernel_cfg.max_features & mask) pr_info("x86/fpu: Supporting XSAVE feature 0x%03Lx: '%s'\n", mask, name); } } -- 2.55.0