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Reg. #308263 - Collinstown Industrial Park, Leixlip, County Kildare - Ireland Content-Transfer-Encoding: 8bit Resending and we can ignore the feedback from Sashiko review because we do not have QAT GEN5 SKUs that have some of the AEs fused off. QAT GEN5 devices (qat_420xx) have enough accelerator engines to run three services concurrently, but the driver currently only allows a maximum of two to be configured at a time, matching the GEN4 limit. This series lifts that restriction so that symmetric crypto, asymmetric crypto and compression can be enabled together on GEN5, as is already possible on GEN6 (qat_6xxx). In summary: Patch #1: Define the firmware object layout, ring-to-service mapping, thread-to-arbiter mapping and service-to-accelerator-engine accounting required for the sym;asym;dc configuration on GEN5, and register the new service combination in adf_cfg_services so that it can be selected through the cfg_services sysfs attribute. Patch #2: Update the cfg_services ABI documentation to state that GEN5 devices (qat_420xx) support a maximum of three combined services, alongside the existing GEN6 entry. Documentation only, no functional change. Bairavi Alagappan (2): crypto: qat - enable three-service mode for QAT GEN5 devices Documentation: qat: document three-service mode for QAT GEN5 devices Documentation/ABI/testing/sysfs-driver-qat | 4 +- .../intel/qat/qat_420xx/adf_420xx_hw_data.c | 104 +++++++++++++++++- .../intel/qat/qat_420xx/adf_420xx_hw_data.h | 6 + .../intel/qat/qat_common/adf_cfg_services.c | 3 + .../intel/qat/qat_common/adf_cfg_services.h | 1 + 5 files changed, 113 insertions(+), 5 deletions(-) base-commit: 9c5d66e1ea78912b8a43ce16a1c14db1357e0ae0 -- 2.50.1