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Tue, 31 Mar 2026 02:40:33 -0700 (PDT) X-Received: by 2002:a17:902:ef4f:b0:2b0:b1e7:8841 with SMTP id d9443c01a7336-2b0cdcb0990mr168484325ad.32.1774950032814; Tue, 31 Mar 2026 02:40:32 -0700 (PDT) Received: from [10.217.223.121] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2b2427660c7sm106046705ad.44.2026.03.31.02.40.23 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 31 Mar 2026 02:40:32 -0700 (PDT) Message-ID: <2b71dd68-ff35-411e-905d-3ffa2ea3efe4@oss.qualcomm.com> Date: Tue, 31 Mar 2026 15:10:22 +0530 Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 01/11] dt-bindings: crypto: qcom,ice: Fix missing power-domain and iface clk To: Kuldeep Singh , Herbert Xu , "David S. Miller" , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Abel Vesa , Manivannan Sadhasivam , cros-qcom-dts-watchers@chromium.org, Eric Biggers , Dmitry Baryshkov , Jingyi Wang , Tengfei Fan , Bartosz Golaszewski , David Wronek , Luca Weiss , Neil Armstrong , Melody Olvera , Alexander Koskovich Cc: Brian Masney , Neeraj Soni , Gaurav Kashyap , linux-arm-msm@vger.kernel.org, linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Konrad Dybcio , Krzysztof Kozlowski References: <20260323-qcom_ice_power_and_clk_vote-v4-0-e36044bbdfe9@oss.qualcomm.com> <20260323-qcom_ice_power_and_clk_vote-v4-1-e36044bbdfe9@oss.qualcomm.com> <873e8ad2-50cd-4c09-9a51-20ad745fe8dc@oss.qualcomm.com> Content-Language: en-US From: Harshal Dev In-Reply-To: <873e8ad2-50cd-4c09-9a51-20ad745fe8dc@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=INwPywvG c=1 sm=1 tr=0 ts=69cb9692 cx=c_pps a=cmESyDAEBpBGqyK7t0alAg==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=P-IC7800AAAA:8 a=EUspDBNiAAAA:8 a=11eJxmzFO3uqpiRjfBAA:9 a=QEXdDO2ut3YA:10 a=1OuFwYUASf3TG4hYMiVC:22 a=d3PnA9EDa4IxuAV0gXij:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzMxMDA5MiBTYWx0ZWRfXyuqhWqowY1ib XspWdqZYi43NjZDjwk7VDB18jPgp1LbmgvAvQml41QXnOQjB5roQIlHXxqEZhBYp/mmCVQ0920x YkCVLRIhi/mH3h2t/ic4PbEVH09FvkyicwV46A2fU68WjOX4LK6xWVhy0nqNiZ8SmUduN5eooBu Mj5ThF/xnsxYdsIt8RM89Zw/zvqqWiJInEKmhxGwoAyejcUd10O+YMUntH1NGTBSlW62BzuR0M9 qQYhMiGCN5CVk/eBISGYTwQ/NQkGscWcZPwbVVTOvC96BSq4BNmptM797L7t1ql9s9uwmYX2qCL lGgfHvY1Qu1KxarOZW1oqNO5BK2qPFEveUWt9WKS0ESMTfWdhKa7b6Zn9tJkeiYvvXZcVIun59b FpuEDKqxqP4H1Ib36TsJJK1W/7PewyXvLEclLAe3li04NzVpotse/oI/1ADejqr12XPQGLh/UVZ NCSBj3stng3cnvvLUsA== X-Proofpoint-GUID: N-runFwL4tIMGR6Y5PEMG4fSZe5z0uIt X-Proofpoint-ORIG-GUID: N-runFwL4tIMGR6Y5PEMG4fSZe5z0uIt X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-31_02,2026-03-28_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 lowpriorityscore=0 clxscore=1015 malwarescore=0 impostorscore=0 adultscore=0 phishscore=0 priorityscore=1501 spamscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603310092 Hi Kuldeep, On 3/24/2026 4:16 PM, Kuldeep Singh wrote: > > On 3/23/2026 2:47 PM, Harshal Dev wrote: >> The DT bindings for inline-crypto engine do not specify the UFS_PHY_GDSC >> power-domain and iface clock. Without enabling the iface clock and the >> associated power-domain the ICE hardware cannot function correctly and >> leads to unclocked hardware accesses being observed during probe. >> >> Fix the DT bindings for inline-crypto engine to require the UFS_PHY_GDSC >> power-domain and iface clock for new devices (Eliza and Milos) introduced >> in the current release (7.0) with yet-to-stabilize ABI, while preserving >> backward compatibility for older devices. >> >> Fixes: 618195a7ac3df ("dt-bindings: crypto: qcom,inline-crypto-engine: Document the Eliza ICE") >> Fixes: 85faec1e85555 ("dt-bindings: crypto: qcom,inline-crypto-engine: document the Milos ICE") >> Signed-off-by: Harshal Dev >> --- >> .../bindings/crypto/qcom,inline-crypto-engine.yaml | 35 +++++++++++++++++++++- >> 1 file changed, 34 insertions(+), 1 deletion(-) >> >> diff --git a/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml b/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml >> index 876bf90ed96e..ccb6b8dd8e11 100644 >> --- a/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml >> +++ b/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml >> @@ -30,6 +30,16 @@ properties: >> maxItems: 1 >> >> clocks: >> + minItems: 1 >> + maxItems: 2 >> + >> + clock-names: >> + minItems: 1 >> + items: >> + - const: core >> + - const: iface >> + >> + power-domains: >> maxItems: 1 >> >> operating-points-v2: true >> @@ -44,6 +54,25 @@ required: >> >> additionalProperties: false >> >> +allOf: >> + - if: >> + properties: >> + compatible: >> + contains: >> + enum: >> + - qcom,eliza-inline-crypto-engine >> + - qcom,milos-inline-crypto-engine >> + >> + then: >> + required: >> + - power-domains >> + - clock-names >> + properties: >> + clocks: >> + minItems: 2 >> + clock-names: >> + minItems: 2 >> + > > Hi Krzysztof, > > As motive here is to enforce 2 clocks for upcoming targets and keep > minItems as 1 for already merged ones for ensuring backward > compatibility. Can we do like below? > > allOf: > - if: > not: > properties: > compatible: > contains: > enum: > - qcom,kaanapali-inline-crypto-engine > - qcom,qcs8300-inline-crypto-engine > - qcom,sa8775p-inline-crypto-engine > - qcom,sc7180-inline-crypto-engine > - qcom,sc7280-inline-crypto-engine > - qcom,sm8450-inline-crypto-engine > - qcom,sm8550-inline-crypto-engine > - qcom,sm8650-inline-crypto-engine > - qcom,sm8750-inline-crypto-engine > > then: > required: > - power-domains > - clock-names > properties: > clocks: > minItems: 2 > clock-names: > minItems: 2 > > This will ensure for every new target addition, default clock count is > enforced as 2 default. > Please share your thoughts as well. > I don't really have any particular objections to this proposal, but I can see that other bindings where the need for an additional clock was realized later on use a similar pattern as this patchset does: https://elixir.bootlin.com/linux/v7.0-rc2/source/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml I'll wait for Krzysztof to take a final call on this. Regards, Harshal