From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3F9667260D; Sun, 25 May 2025 11:29:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748172551; cv=none; b=bBmvjvHrY3/mb8seXLd1w23+hQ4ocC+EsHaybdP9jf5UiZwAPgrXnegzuvLae7PPIxqBE/IHDQvDz7TAOL2TymRr7imdW/ki7wYcgZysQ3VvUDI1U9an2gziL9ZeH1M3odlgM4P9a3xEdeKbZTc/fFJrFavp1AmXjNjGmKJteUY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748172551; c=relaxed/simple; bh=IqmcfJJjASZHAaTmvw4yjEkeskN89RbILi61o3i6NTo=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=ixpNdp5d8gXPyBiG0Wji/4+18BFdOJoj/MSCjxovLmcPtogfy2+Gu5n4+F0WNLyeKV60VAHBDN1AZMHpeeqzkTyX27xoHfnYqsiQ3xtTCqTyL704Q8nTCR/jjf+sdF3DVOHzJnpLQO6ly8afREe1jS6Nx7YWVroXbSXYhEuEOWE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=e5GC7vRE; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="e5GC7vRE" Received: by smtp.kernel.org (Postfix) with ESMTPSA id DFCCAC4CEEA; Sun, 25 May 2025 11:29:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1748172550; bh=IqmcfJJjASZHAaTmvw4yjEkeskN89RbILi61o3i6NTo=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=e5GC7vREC3EDcv0o8jT8EDKOkfhhbfk45mdux7A7iR69Q4RDa5p0qJPMDppvBb8jM y6pb3cKSePbmtYJyLC9NBXUsJTeMWakqUDWCH36lMsdrpOWJEYghrWAusF0hZ+DZ5a M78Xff4MASez38jjzE0EXBxASRJFZoNuqjVyEIa8x+yoqpYgsOLwut5o57JvK47cnS mKZfiebp7xziBYdX59kwpWFMErLkL5OYW0z/xg7UVeMyeIy7cUITXLIgMsLvpVbUm4 2yHTwTIzGDANzoxl1HHhapBrb1dAgXmELLtMViYQEGVfTrqRym+HaeVgzPF3zYwp+R Zh80fiZlfpXYw== Message-ID: <4d1124ed-f0e8-4c59-9c8e-e1d5f69b10cb@kernel.org> Date: Sun, 25 May 2025 13:29:06 +0200 Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/6] dt-bindings: crypto: Document support for SPAcc To: Pavitrakumar Managutte Cc: linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, herbert@gondor.apana.org.au, robh@kernel.org, Ruud.Derwig@synopsys.com, Conor Dooley , davem@davemloft.net, linux-kernel@vger.kernel.org, adityak@vayavyalabs.com, manjunath.hadli@vayavyalabs.com, Bhoomika Kadabi References: <20250505125538.2991314-1-pavitrakumarm@vayavyalabs.com> <20250505125538.2991314-2-pavitrakumarm@vayavyalabs.com> <5b6c66e8-3fac-408f-980c-f261ccd3fefd@kernel.org> <19b1fca7-e1b1-4190-9bcb-7ce36fabd02e@kernel.org> <1f4d4292-fbf9-42db-b4e0-6f9326b937fc@kernel.org> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 8bit On 23/05/2025 10:24, Pavitrakumar Managutte wrote: > Hi Krzysztof, > My comments are embedded below. Appreciate your inputs. > > Warm regards, > PK > > On Sun, May 18, 2025 at 7:00 PM Krzysztof Kozlowski wrote: >> >> On 13/05/2025 08:30, Pavitrakumar Managutte wrote: >>>>>>> >>>>>>> I do not see any improvements. It seems you ignored all comments, not >>>>>>> single one was responded to or addressed. >>>>> >>>>> PK: Addressed all the below >>>>> >>>>> 1. SoC Bindings: We dont have any SoC bindings since its tested on the >>>>> Zynq platform (on FPGA). So I have retained just the Synopsys SPAcc >>>>> device here. Also added a detailed description for the same, which >>>>> describes how we have tested the SPAcc peripheral on Zynq. This was >>>>> based on your inputs to describe the existing hardware. >>>> >>>> 1. I asked to use SoC specific compatibles and after such explanation >>>> that you use it in some different, hardware configuration, I asked to >>>> use that. >>>> >>>> Reflect whatever your hardware is called in the compatible. >>> >>> PK: Some context from my side which might clear up things >>> 1. We have developed the SPAcc Crypto Linux driver for the Synopsys SPAcc IP. >>> 2. Yes, this is technically a soft IP which we test on FPGA (Zynq >>> Ultrascale Boards). >>> 3. We are NOT evaluating SPAcc IP and thus its not a custom use case >>> or a custom hardware. >>> 4. Also SPAcc IP is NOT part of any SoC yet, but it may be in future. >>> >>> Synopsys Semiconductor IP Business: >>> Synopsys develops Semiconductor IPs (aka DesignWare IPs) and provides >>> Linux device drivers to the SoC Vendors. We, as partners of Synopsys, >>> develop Linux device drivers for the IP, in this case SPAcc. So as of >>> now SPAcc is just a semiconductor IP which is not part of any SoC. A >>> 3rd party SoC vendor would take this and integrate this as part of >>> their upcoming SoC. >>> >>> SPAcc Semiconductor IP details: >>> https://www.synopsys.com/designware-ip/security-ip/security-protocol-accelerators.html >>> >>> Synopsys DesignWare IPs >>> 1. DWC MMC Host controller drivers : drivers/mmc/host/dw_mmc.c >>> 2. DWC HSOTG Driver : drivers/usb/dwc2, drivers/usb/dwc3 >>> 3. DWC Ethernet driver : drivers/net/ethernet/synopsys >>> 4. DWC DMA driver : drivers/dma/dw/ >>> >>> Intent of upstreaming IP drivers by Synopsys >>> 1. As a Semiconductor IP designer, Synopsys provides Linux device >>> drivers with their IPs to the customers. >>> 2. These Linux drivers handle all the configurations in those respective IPs. >>> 3. At this stage of driver development, the focus is on the Semiconductor IP >>> 4. Yes, the IP can be configured differently for different SoCs and >>> the driver has to take care of that. >>> 5. The driver might need some enhancements based on the SoC >>> configurations, which could be done later. >>> 6. Its a good approach to upstream IP drivers, so the vendors could >>> use/enhance the same open sourced drivers. >> >> >> Yeah, I am familiar with this... >> >>> >>>> >>>> I claim this cannot be used in a SoC without customization. If I >>> >>> PK: Synopsys SPAcc is a highly configurable semiconductor IP. I agree >>> that it can be customized for the SoC vendors. But I dont understand >>> why it can't be used without SoC customizations for a default >> >> >> Ask hardware team what is necessary to implement given IP in an SoC. SoC >> architectures are not that simple, that you copy&paste some piece of >> VHDL code and it plugs into existing wiring. You need that wiring, you >> need that SoC specific bits in your design. > > PK: I discussed this with my hardware team and their response is as below. > > "Besides the bus interface (base address) and interrupt described in > the new binding there are standard power and clock and possibly a > reset interface. However, these have no influence on the driver, so > are not included in the dts to keep things simple. > The hardware IP can be configured to run synchronously to the bus or > have a clock crossing, but as there is no notion of time/frequency in > the driver that's not relevant to the driver. > Same for power signals, there is no additional power management in the IP block. > If you prefer power/clock/reset to be added, can you please point us > to an example which you consider best practice that we can follow?" Example not to follow but example to look and see that same block is customized per SoC: 1. qcom,dwc3 2. rockchip,rk3328-dwc3 Quite different clock inputs, resets, interconnects and power-domains. > >> >>> configuration. All the IP customizations are handled by the driver. >> >> I don't talk about driver. We talk about hardware and bindings. >> >>> Say, in the case of SPAcc, all the IP customizations are accessible as >>> part of the "Version" and "Version Extension-1, 2, 3" registers. So >>> the driver uses these IP customizations and nothing gets hardcoded. In >>> other cases, those customizations will come as vendor specific DT >>> properties. >> >> Do you understand the problem discussed here? There is a long standing >> policy, based on actual real hardware and real cases, that you cannot >> have generic compatibles for custom IP blocks. That's it. >> > PK: Agreed > >>> >>> As an IP, which can be memory mapped and with interrupt support, it >>> works perfectly with a default test configuration. And this is what >>> the current driver has. >>> >>>> understood correctly this is soft IP in FPGA for evaluation, so no one >>>> will be ever able to use it. Therefore this binding makes no sense to me >>> >>> PK: No, we are not evaluating, but we have developed a driver for >>> SPAcc, which has been tested on a FPGA. >> >> So some sort of FPGA in some sort of setup which you claim with this >> patch is exactly the same for every other SoC. That is the meaning of >> your patch, to which I objected. > PK: Agreed > >> >>> >>>> in general: you do not add anything any customer could use. It is fine >>>> to add something which you use internally only, but again describe the >>>> hardware properly. >>> >>> PK: Its not an internal use case. We have tested the SPAcc driver on a >>> FPGA, as detailed above. We dont have any custom hardware and the >>> SPAcc IP is tested in a default configuration. >>> >>> Question : Could you help me understand how a semiconductor IP vendor >>> like Synopsys, upstream Linux drivers for its IPs? In the current >> >> We are not even talking here about drives. I do not have to provide you >> answers for drivers. >> >> I explained already what I expect from bindings: real hardware >> description, so either real SoC or whatever you are having there. > > PK: The SPAcc, is also tested on "nsimosci", which is an ARC based > environment. This is our real use case. We already have the ARC dts > files upstreamed as shown below > > linux/arch/arc/boot/dts/skeleton.dtsi This feels (and looks inside) like not a SoC, but discouraged skeleton. > linux/arch/arc/boot/dts/skeleton_hs.dtsi > linux/arch/arc/boot/dts/nscimosci.dts > linux/arch/arc/boot/dts/nscimosci_hs.dts > > I can add a SPAcc device node to > linux/arch/arc/boot/dts/nscimosci_hs_spacc.dts and accordingly create > the dts yaml bindings. With this change my SPAcc yaml binding is going > to look like the below snippet. > > ------------------------------------------------------------- > properties: > compatible: > - items: > - const: snps,skeleton_hs-spacc > - const: snps,dwc-spacc Still, drop the last and add one only for your ARC platform (s/_/-/). Just name it after your platform, SoC or whatever you have there. Best regards, Krzysztof