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Registered Address: Red Hat UK Ltd, Amberley Place, 107-111 Peascod Street, Windsor, Berkshire, SI4 1TE, United Kingdom. Registered in England and Wales under Company Registration No. 3798903 From: David Howells In-Reply-To: <20250919203208.GA8350@quark> References: <20250919203208.GA8350@quark> <20250919190413.GA2249@quark> <3936580.1758299519@warthog.procyon.org.uk> <3975735.1758311280@warthog.procyon.org.uk> To: Eric Biggers Cc: dhowells@redhat.com, "Jason A. Donenfeld" , Ard Biesheuvel , Harald Freudenberger , Holger Dengler , Herbert Xu , Stephan Mueller , Simo Sorce , linux-crypto@vger.kernel.org, linux-s390@vger.kernel.org, keyrings@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2] lib/crypto: Add SHA3-224, SHA3-256, SHA3-384, SHA-512, SHAKE128, SHAKE256 Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-ID: <538562.1758648981.1@warthog.procyon.org.uk> Date: Tue, 23 Sep 2025 18:36:21 +0100 Message-ID: <538563.1758648981@warthog.procyon.org.uk> X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 Eric Biggers wrote: > > > and that the functions can be called in any context. > > > > "Context" as in? > > See the "Function context" section of > Documentation/doc-guide/kernel-doc.rst Btw, in include/crypto/sha1.h: /** * hmac_sha1_update() - Update an HMAC-SHA1 context with message data * @ctx: the HMAC context to update; must have been initialized * @data: the message data * @data_len: the data length in bytes * * This can be called any number of times. * * Context: Any context. */ static inline void hmac_sha1_update(struct hmac_sha1_ctx *ctx, const u8 *data, size_t data_len) { sha1_update(&ctx->sha_ctx, data, data_len); } for example, your specification of "Context: Any context." is probably not correct if FPU/Vector registers are used by optimised assembly as part of the function. See: void kernel_fpu_begin_mask(unsigned int kfpu_mask) { if (!irqs_disabled()) fpregs_lock(); WARN_ON_FPU(!irq_fpu_usable()); /* Toggle kernel_fpu_allowed to false: */ WARN_ON_FPU(!this_cpu_read(kernel_fpu_allowed)); this_cpu_write(kernel_fpu_allowed, false); if (!(current->flags & (PF_KTHREAD | PF_USER_WORKER)) && !test_thread_flag(TIF_NEED_FPU_LOAD)) { set_thread_flag(TIF_NEED_FPU_LOAD); save_fpregs_to_fpstate(x86_task_fpu(current)); } __cpu_invalidate_fpregs_state(); /* Put sane initial values into the control registers. */ if (likely(kfpu_mask & KFPU_MXCSR) && boot_cpu_has(X86_FEATURE_XMM)) ldmxcsr(MXCSR_DEFAULT); if (unlikely(kfpu_mask & KFPU_387) && boot_cpu_has(X86_FEATURE_FPU)) asm volatile ("fninit"); } If you try and access the function in IRQ mode, for example, you'll get a warning, and if IRQs are not disabled, it will disable BH/preemption. You also can't use it from inside something else that uses FPU registers. I suggest something like: * Context: Arch-dependent: May use the FPU/Vector unit registers. David.