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Mon, 11 May 2020 23:47:05 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Mon, 11 May 2020 23:47:05 -0500 Received: from [127.0.0.1] (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 04C4l2YK121221; Mon, 11 May 2020 23:47:04 -0500 Subject: Re: [PATCHv2 1/7] dt-bindings: crypto: Add TI SA2UL crypto accelerator documentation To: Rob Herring CC: , , , Keerthy , References: <20200424164430.3288-1-t-kristo@ti.com> <20200424164430.3288-2-t-kristo@ti.com> <20200511215343.GA10123@bogus> From: Tero Kristo Message-ID: <53c7c7db-9357-c2fa-c792-64261489d32c@ti.com> Date: Tue, 12 May 2020 07:47:02 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.4.1 MIME-Version: 1.0 In-Reply-To: <20200511215343.GA10123@bogus> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org On 12/05/2020 00:53, Rob Herring wrote: > On Fri, Apr 24, 2020 at 07:44:24PM +0300, Tero Kristo wrote: >> From: Keerthy >> >> The Security Accelerator Ultra Lite (SA2UL) subsystem provides hardware >> cryptographic acceleration for the following use cases: >> >> * Encryption and authentication for secure boot >> * Encryption and authentication of content in applications >> requiring DRM (digital rights management) and >> content/asset protection >> >> SA2UL provides support for number of different cryptographic algorithms >> including SHA1, SHA256, SHA512, AES, 3DES, and various combinations of >> the previous for AEAD use. >> >> Cc: Rob Herring >> Cc: devicetree@vger.kernel.org >> Signed-off-by: Keerthy >> [t-kristo@ti.com: converted documentation to yaml] >> Signed-off-by: Tero Kristo >> --- >> .../devicetree/bindings/crypto/ti,sa2ul.yaml | 76 +++++++++++++++++++ >> 1 file changed, 76 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/crypto/ti,sa2ul.yaml >> >> diff --git a/Documentation/devicetree/bindings/crypto/ti,sa2ul.yaml b/Documentation/devicetree/bindings/crypto/ti,sa2ul.yaml >> new file mode 100644 >> index 000000000000..27bb3a7e2b87 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/crypto/ti,sa2ul.yaml >> @@ -0,0 +1,76 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/crypto/ti,sa2ul.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: K3 SoC SA2UL crypto module >> + >> +maintainers: >> + - Tero Kristo >> + >> +properties: >> + compatible: >> + enum: >> + - ti,j721e-sa2ul >> + - ti,am654-sa2ul >> + >> + reg: >> + maxItems: 1 >> + >> + power-domains: >> + maxItems: 1 >> + >> + dmas: >> + items: >> + - description: TX DMA Channel >> + - description: RX DMA Channel #1 >> + - description: RX DMA Channel #2 >> + >> + dma-names: >> + items: >> + - const: tx >> + - const: rx1 >> + - const: rx2 >> + >> + dma-coherent: true >> + >> + "#address-cells": >> + const: 2 >> + >> + "#size-cells": >> + const: 2 >> + >> + ranges: >> + description: >> + Address translation for the possible RNG child node for SA2UL >> + >> +patternProperties: >> + "^rng@[a-lf0-9]+$": > > a-l? Ooops, thats a typo right here. Will fix that. > >> + type: object >> + description: >> + Child RNG node for SA2UL > > Does this child node have a binding? Yes, it is here: Documentation/devicetree/bindings/rng/omap_rng.txt. It is an old one so not converted to yaml yet though. -Tero > >> + >> +required: >> + - compatible >> + - reg >> + - power-domains >> + - dmas >> + - dma-names >> + - dma-coherent >> + >> +additionalProperties: false >> + >> +examples: >> + - | >> + #include >> + >> + main_crypto: crypto@4e00000 { >> + compatible = "ti,j721-sa2ul"; >> + reg = <0x0 0x4e00000 0x0 0x1200>; >> + power-domains = <&k3_pds 264 TI_SCI_PD_EXCLUSIVE>; >> + dmas = <&main_udmap 0xc000>, <&main_udmap 0x4000>, >> + <&main_udmap 0x4001>; >> + dma-names = "tx", "rx1", "rx2"; >> + dma-coherent; >> + }; >> -- >> 2.17.1 >> >> -- -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki