* Re: [PATCH] crypto: qat - fix CTX_ENABLES bits shift direction issue
[not found] <1449812574-35124-1-git-send-email-pingchao.yang@intel.com>
@ 2015-12-11 15:22 ` Tadeusz Struk
2015-12-12 5:46 ` Herbert Xu
0 siblings, 1 reply; 6+ messages in thread
From: Tadeusz Struk @ 2015-12-11 15:22 UTC (permalink / raw)
To: Yang Pingchao, herbert; +Cc: linux-crypto, dan.carpenter
On 12/10/2015 09:42 PM, Yang Pingchao wrote:
> AE CTX bits should be 8-15 in CTX_ENABLES, so the mask value 0xff should be
> left shifted 0x8
>
> Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
> Signed-off-by: Yang Pingchao <pingchao.yang@intel.com>
> ---
> drivers/crypto/qat/qat_common/qat_hal.c | 2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
Acked-by: Tadeusz Struk <tadeusz.struk@intel.com>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] crypto: qat - fix CTX_ENABLES bits shift direction issue
2015-12-11 15:22 ` [PATCH] crypto: qat - fix CTX_ENABLES bits shift direction issue Tadeusz Struk
@ 2015-12-12 5:46 ` Herbert Xu
0 siblings, 0 replies; 6+ messages in thread
From: Herbert Xu @ 2015-12-12 5:46 UTC (permalink / raw)
To: Tadeusz Struk; +Cc: Yang Pingchao, linux-crypto, dan.carpenter
On Fri, Dec 11, 2015 at 07:22:12AM -0800, Tadeusz Struk wrote:
> On 12/10/2015 09:42 PM, Yang Pingchao wrote:
> > AE CTX bits should be 8-15 in CTX_ENABLES, so the mask value 0xff should be
> > left shifted 0x8
> >
> > Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
> > Signed-off-by: Yang Pingchao <pingchao.yang@intel.com>
> > ---
> > drivers/crypto/qat/qat_common/qat_hal.c | 2 +-
> > 1 files changed, 1 insertions(+), 1 deletions(-)
>
> Acked-by: Tadeusz Struk <tadeusz.struk@intel.com>
This patch isn't in patchworks so it needs to be resubmitted.
Thanks,
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH] crypto: qat - fix CTX_ENABLES bits shift direction issue
@ 2015-12-16 2:39 Yang Pingchao
2015-12-16 8:09 ` walter harms
2015-12-22 13:22 ` Herbert Xu
0 siblings, 2 replies; 6+ messages in thread
From: Yang Pingchao @ 2015-12-16 2:39 UTC (permalink / raw)
To: herbert
Cc: dan.carpenter, tadeusz.struk, linux-crypto, qat-linux,
kernel-janitors, Yang Pingchao
AE CTX bits should be 8-15 in CTX_ENABLES, so the mask
value 0xff should be left shifted 0x8.
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Yang Pingchao <pingchao.yang@intel.com>
---
drivers/crypto/qat/qat_common/qat_hal.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/qat/qat_common/qat_hal.c b/drivers/crypto/qat/qat_common/qat_hal.c
index 45c1739..81bd1fe 100644
--- a/drivers/crypto/qat/qat_common/qat_hal.c
+++ b/drivers/crypto/qat/qat_common/qat_hal.c
@@ -418,7 +418,7 @@ int qat_hal_check_ae_active(struct icp_qat_fw_loader_handle *handle,
qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES, &enable);
qat_hal_rd_ae_csr(handle, ae, ACTIVE_CTX_STATUS, &active);
- if ((enable & (0xff >> CE_ENABLE_BITPOS)) ||
+ if ((enable & (0xff << CE_ENABLE_BITPOS)) ||
(active & (1 << ACS_ABO_BITPOS)))
return 1;
else
--
2.6.4
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH] crypto: qat - fix CTX_ENABLES bits shift direction issue
2015-12-16 2:39 Yang Pingchao
@ 2015-12-16 8:09 ` walter harms
2015-12-16 8:22 ` Yang, Pingchao
2015-12-22 13:22 ` Herbert Xu
1 sibling, 1 reply; 6+ messages in thread
From: walter harms @ 2015-12-16 8:09 UTC (permalink / raw)
To: Yang Pingchao
Cc: herbert, dan.carpenter, tadeusz.struk, linux-crypto, qat-linux,
kernel-janitors
Am 16.12.2015 03:39, schrieb Yang Pingchao:
> AE CTX bits should be 8-15 in CTX_ENABLES, so the mask
> value 0xff should be left shifted 0x8.
>
> Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
> Signed-off-by: Yang Pingchao <pingchao.yang@intel.com>
> ---
> drivers/crypto/qat/qat_common/qat_hal.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/crypto/qat/qat_common/qat_hal.c b/drivers/crypto/qat/qat_common/qat_hal.c
> index 45c1739..81bd1fe 100644
> --- a/drivers/crypto/qat/qat_common/qat_hal.c
> +++ b/drivers/crypto/qat/qat_common/qat_hal.c
> @@ -418,7 +418,7 @@ int qat_hal_check_ae_active(struct icp_qat_fw_loader_handle *handle,
>
> qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES, &enable);
> qat_hal_rd_ae_csr(handle, ae, ACTIVE_CTX_STATUS, &active);
> - if ((enable & (0xff >> CE_ENABLE_BITPOS)) ||
> + if ((enable & (0xff << CE_ENABLE_BITPOS)) ||
> (active & (1 << ACS_ABO_BITPOS)))
> return 1;
> else
Is there any reason for using 0xff << CE_ENABLE_BITPOS instead of 0xff00 ?
re,
wh
^ permalink raw reply [flat|nested] 6+ messages in thread
* RE: [PATCH] crypto: qat - fix CTX_ENABLES bits shift direction issue
2015-12-16 8:09 ` walter harms
@ 2015-12-16 8:22 ` Yang, Pingchao
0 siblings, 0 replies; 6+ messages in thread
From: Yang, Pingchao @ 2015-12-16 8:22 UTC (permalink / raw)
To: wharms@bfs.de
Cc: herbert@gondor.apana.org.au, dan.carpenter@oracle.com,
Struk, Tadeusz, linux-crypto@vger.kernel.org, qat-linux,
kernel-janitors@vger.kernel.org
There is no very strong reason, but I think 0xff << CE_ENABLE_BITPOS is more clearly for reading,
So that we can clearly know we are accessing the 8 CTXs in CTX_ENABLES CSR 8-15 bits.
Best Regards,
Pingchao yang
-----Original Message-----
From: walter harms [mailto:wharms@bfs.de]
Sent: Wednesday, December 16, 2015 4:10 PM
To: Yang, Pingchao
Cc: herbert@gondor.apana.org.au; dan.carpenter@oracle.com; Struk, Tadeusz; linux-crypto@vger.kernel.org; qat-linux; kernel-janitors@vger.kernel.org
Subject: Re: [PATCH] crypto: qat - fix CTX_ENABLES bits shift direction issue
Am 16.12.2015 03:39, schrieb Yang Pingchao:
> AE CTX bits should be 8-15 in CTX_ENABLES, so the mask value 0xff
> should be left shifted 0x8.
>
> Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
> Signed-off-by: Yang Pingchao <pingchao.yang@intel.com>
> ---
> drivers/crypto/qat/qat_common/qat_hal.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/crypto/qat/qat_common/qat_hal.c
> b/drivers/crypto/qat/qat_common/qat_hal.c
> index 45c1739..81bd1fe 100644
> --- a/drivers/crypto/qat/qat_common/qat_hal.c
> +++ b/drivers/crypto/qat/qat_common/qat_hal.c
> @@ -418,7 +418,7 @@ int qat_hal_check_ae_active(struct
> icp_qat_fw_loader_handle *handle,
>
> qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES, &enable);
> qat_hal_rd_ae_csr(handle, ae, ACTIVE_CTX_STATUS, &active);
> - if ((enable & (0xff >> CE_ENABLE_BITPOS)) ||
> + if ((enable & (0xff << CE_ENABLE_BITPOS)) ||
> (active & (1 << ACS_ABO_BITPOS)))
> return 1;
> else
Is there any reason for using 0xff << CE_ENABLE_BITPOS instead of 0xff00 ?
re,
wh
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] crypto: qat - fix CTX_ENABLES bits shift direction issue
2015-12-16 2:39 Yang Pingchao
2015-12-16 8:09 ` walter harms
@ 2015-12-22 13:22 ` Herbert Xu
1 sibling, 0 replies; 6+ messages in thread
From: Herbert Xu @ 2015-12-22 13:22 UTC (permalink / raw)
To: Yang Pingchao
Cc: dan.carpenter, tadeusz.struk, linux-crypto, qat-linux,
kernel-janitors
On Wed, Dec 16, 2015 at 10:39:40AM +0800, Yang Pingchao wrote:
> AE CTX bits should be 8-15 in CTX_ENABLES, so the mask
> value 0xff should be left shifted 0x8.
>
> Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
> Signed-off-by: Yang Pingchao <pingchao.yang@intel.com>
Patch applied. Thanks.
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
^ permalink raw reply [flat|nested] 6+ messages in thread
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2015-12-11 15:22 ` [PATCH] crypto: qat - fix CTX_ENABLES bits shift direction issue Tadeusz Struk
2015-12-12 5:46 ` Herbert Xu
2015-12-16 2:39 Yang Pingchao
2015-12-16 8:09 ` walter harms
2015-12-16 8:22 ` Yang, Pingchao
2015-12-22 13:22 ` Herbert Xu
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