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[199.106.103.254]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-302973bc9d4sm6771472eec.23.2026.05.15.06.23.18 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 15 May 2026 06:23:20 -0700 (PDT) Message-ID: <56f5e73b-5f40-4bfb-9796-dadfcb4f9085@oss.qualcomm.com> Date: Fri, 15 May 2026 21:23:16 +0800 Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/3] dt-bindings: crypto: qcom,ice: Add sa8255p support To: Krzysztof Kozlowski Cc: Rob Herring , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Herbert Xu , "David S . Miller" , devicetree@vger.kernel.org, linux-crypto@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260512033750.3393050-1-linlin.zhang@oss.qualcomm.com> <20260512033750.3393050-2-linlin.zhang@oss.qualcomm.com> <20260514-clever-apricot-goose-acc827@quoll> Content-Language: en-US From: Linlin Zhang In-Reply-To: <20260514-clever-apricot-goose-acc827@quoll> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: 368SRy1vZkbbiJ3Qi4P3qXqXT_hIaJ7Q X-Proofpoint-ORIG-GUID: 368SRy1vZkbbiJ3Qi4P3qXqXT_hIaJ7Q X-Authority-Analysis: v=2.4 cv=GrhyPE1C c=1 sm=1 tr=0 ts=6a071e4a cx=c_pps a=Uww141gWH0fZj/3QKPojxA==:117 a=JYp8KDb2vCoCEuGobkYCKw==:17 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_K5XuSEh1TEqbUxoQ0s3:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=1_zi5yXmVb3nt7myx10A:9 a=QEXdDO2ut3YA:10 a=PxkB5W3o20Ba91AHUih5:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTE1MDEzNiBTYWx0ZWRfXwrq8wm2taHhN g+DHq+slb+6SNzzsgBmmRh4HaNX6vqBbAaUiy4I3jeW0INjfnxOgwlK7/dM3EFzS3uV5CvmrY3n +6zF+fNeJysvDsqwDQ8zhdD39SF5u9vukseNU1KXiBKULyTBhC4yfw+F9IOaKfDzAovQUqtIiDL 7BPvV9EKz6dpNd08LijAAm/z7s7V8nz6UwrtK8GKVnuQ5FlbMui88nT++HdB5RBPj7sWznAdX7O NPUtYzmUDPDL+CBw0JyWvi3SPhpVWWc5gCc2mH3at7BpSeXlIzoA6HqscJrS9GR6yTsHHOev8ek ttUe+E9Nn7+76hsEdM0dtmqqqXoi0VqmsWrXssDBJ28COvRzXAzkedwrqy1j/F88L2EQhycKx7s z32EMVw1Qo+NtU6/+PPGp4D9dge4QC3evyk1Cyai102+NNBfdyPIcuyg0cNUbkDX/4dmIw+ddsL b+kHzN2UsqEwzBj/NTA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-15_03,2026-05-13_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 clxscore=1015 lowpriorityscore=0 adultscore=0 bulkscore=0 spamscore=0 suspectscore=0 impostorscore=0 phishscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605150136 On 5/14/2026 8:55 PM, Krzysztof Kozlowski wrote: > On Mon, May 11, 2026 at 08:37:48PM -0700, Linlin Zhang wrote: >> On sa8255p, resources such as PHY, clocks, regulators, and resets are >> managed by remote firmware via the SCMI power protocol. As a result, the >> ICE driver cannot directly access clocks and must instead use power-domains >> to request resource configuration. > > Then how can it be compatible with qcom,inline-crypto-engine? Thanks for the review. You are right that the SCMI-based implementation differs from the traditional inline crypto engine in terms of resource control. On sa8255p, clocks and other resources are managed by remote firmware via SCMI, so the driver does not directly control these resources and instead relies on power domains. Given this difference, the SCMI variant does not match the same programming model as the existing qcom,inline-crypto-engine implementation. Using it as a generic fallback is therefore not appropriate, as the generic compatible implies that the device can be handled equivalently by the same driver assumptions, which is not the case here. I will rework the bindings to: - introduce a separate binding for the SCMI-based variant, and - drop the generic fallback compatible string. This should align better with other SCMI-based bindings and avoid overloading the meaning of the generic compatible. Thanks for pointing this out. > >> >> Add the qcom,sa8255p-inline-crypto-engine compatible string and make clocks >> optional for platforms that use power-domains instead. >> >> Signed-off-by: Linlin Zhang >> --- >> .../crypto/qcom,inline-crypto-engine.yaml | 27 ++++++++++++++++++- >> 1 file changed, 26 insertions(+), 1 deletion(-) > > So this is v2? But previous was v6? Look: > > b4 diff '20260512033750.3393050-1-linlin.zhang@oss.qualcomm.com' > Looking up https://lore.kernel.org/all/20260512033750.3393050-1-linlin.zhang@oss.qualcomm.com/ > Grabbing thread from lore.kernel.org/all/20260512033750.3393050-1-linlin.zhang@oss.qualcomm.com/t.mbox.gz > Checking for older revisions > Grabbing search results from lore.kernel.org > --- > Analyzing 8 messages in the thread > Could not find lower series to compare against. This patch was review internally, and the final version was v6 which is approved for posting to upstream review. I'm sorry that I forgot update the version to v1 when I posted this patch to https://lore.kernel.org/. This is why you see the previous was v6. I updated the patch to v2 (this is current patchset) with some changes. Would you please help instruct me how to fix it? need I re-post the patch serial from v1? > > >> >> diff --git a/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml b/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml >> index 876bf90ed96e..4e7d9111d0eb 100644 >> --- a/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml >> +++ b/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml > > This should go to its own binding file just like in all other > SCMI-variant cases. And if you looked how these other files are done, > you would see my complains already that generic fallback is most likely > wrong. > > Otherwise explain me what the generic fallback means here and how is it > supposed to work? ACK. I'll separate the binding and remove the generic fallback. > > Best regards, > Krzysztof >