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X-CSE-ConnectionGUID: LVxHglW5TWavH4dMC67wzQ== X-CSE-MsgGUID: dMpRvnkjQraNyJG2Pc4h/Q== X-IronPort-AV: E=McAfee;i="6700,10204,11357"; a="41579817" X-IronPort-AV: E=Sophos;i="6.13,317,1732608000"; d="scan'208";a="41579817" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Feb 2025 09:09:30 -0800 X-CSE-ConnectionGUID: fdNNbC1yTaun7e2cRxPbvQ== X-CSE-MsgGUID: 7ZU8MHxaS0CAxG0yml802w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,317,1732608000"; d="scan'208";a="121758725" Received: from inaky-mobl1.amr.corp.intel.com (HELO [10.125.111.226]) ([10.125.111.226]) by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Feb 2025 09:09:29 -0800 Message-ID: <5fd6c945-9319-4bde-9c0b-3ab864da111c@intel.com> Date: Wed, 26 Feb 2025 09:09:39 -0800 Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH 1/2] x86/fpu: make kernel-mode FPU reliably usable in softirqs To: Eric Biggers , David Laight Cc: Xiao Liang , x86@kernel.org, linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org, Ard Biesheuvel , Ben Greear , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , Andy Lutomirski References: <20250220051325.340691-1-ebiggers@kernel.org> <20250220051325.340691-2-ebiggers@kernel.org> <20250221193124.GA3790599@google.com> <20250225222133.395f7194@pumpkin> <20250225225932.GA2975818@google.com> From: Dave Hansen Content-Language: en-US Autocrypt: addr=dave.hansen@intel.com; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 2/25/25 14:59, Eric Biggers wrote: > If we had to save/restore a large number of vector registers in every crypto > function call (not amortized to one save/restore per return to userspace), that > would be a big performance problem. I just did a quick trace on my laptop. Looks like I have two main kernel_fpu_begin() users: LUKS and networking. They both very much seem to do a bunch of kernel_fpu_begin() operations but very few actual XSAVEs: 26 : save_fpregs_to_fpstate <-kernel_fpu_begin_mask 818 : kernel_fpu_begin_mask <-crc32c_pcl_intel_update 4192 : kernel_fpu_begin_mask <-xts_encrypt_vaes_avx10_256 This is at least _one_ data point very much in favor of Eric's argument here. It appears that that the cost of one XSAVE is amortized across a bunch of kernel_fpu_begin()s.