public inbox for linux-crypto@vger.kernel.org
 help / color / mirror / Atom feed
From: Kuldeep Singh <kuldeep.singh@oss.qualcomm.com>
To: Harshal Dev <harshal.dev@oss.qualcomm.com>,
	Herbert Xu <herbert@gondor.apana.org.au>,
	"David S. Miller" <davem@davemloft.net>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>,
	Abel Vesa <abel.vesa@oss.qualcomm.com>,
	Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>,
	cros-qcom-dts-watchers@chromium.org,
	Eric Biggers <ebiggers@google.com>,
	Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>,
	Jingyi Wang <jingyi.wang@oss.qualcomm.com>,
	Tengfei Fan <tengfei.fan@oss.qualcomm.com>,
	Bartosz Golaszewski <brgl@kernel.org>,
	David Wronek <davidwronek@gmail.com>,
	Luca Weiss <luca.weiss@fairphone.com>,
	Neil Armstrong <neil.armstrong@linaro.org>,
	Melody Olvera <quic_molvera@quicinc.com>,
	Alexander Koskovich <akoskovich@pm.me>,
	Abel Vesa <abelvesa@kernel.org>
Cc: Brian Masney <bmasney@redhat.com>,
	Neeraj Soni <neeraj.soni@oss.qualcomm.com>,
	Gaurav Kashyap <gaurav.kashyap@oss.qualcomm.com>,
	linux-arm-msm@vger.kernel.org, linux-crypto@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	Krzysztof Kozlowski <krzk@kernel.org>,
	Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Subject: Re: [PATCH v5 12/13] arm64: dts: qcom: milos: Add power-domain and iface clk for ice node
Date: Tue, 21 Apr 2026 14:57:52 +0530	[thread overview]
Message-ID: <743ae20d-1894-4566-992f-db8dccebee9f@oss.qualcomm.com> (raw)
In-Reply-To: <20260416-qcom_ice_power_and_clk_vote-v5-12-5ccf5d7e2846@oss.qualcomm.com>

On 16-04-2026 17:29, Harshal Dev wrote:
> Qualcomm in-line crypto engine (ICE) platform driver specifies and votes
> for its own resources. Before accessing ICE hardware during probe, to
> avoid potential unclocked register access issues (when clk_ignore_unused
> is not passed on the kernel command line), in addition to the 'core' clock
> the 'iface' clock should also be turned on by the driver. This can only be
> done if the UFS_PHY_GDSC power domain is enabled. Specify both the
> UFS_PHY_GDSC power domain and the 'iface' clock in the ICE node for milos.
> 
> Fixes: 04bb37433330e ("arm64: dts: qcom: milos: Add UFS nodes")
> Signed-off-by: Harshal Dev <harshal.dev@oss.qualcomm.com>

Reviewed-by: Kuldeep Singh <kuldeep.singh@oss.qualcomm.com>

-- 
Regards
Kuldeep


  reply	other threads:[~2026-04-21  9:28 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-16 11:59 [PATCH v5 00/13] Add explicit clock vote and enable power-domain for QCOM-ICE Harshal Dev
2026-04-16 11:59 ` [PATCH v5 01/13] dt-bindings: crypto: qcom,ice: Fix missing power-domain and iface clk Harshal Dev
2026-04-16 11:59 ` [PATCH v5 02/13] soc: qcom: ice: Allow explicit votes on 'iface' clock for ICE Harshal Dev
2026-04-16 11:59 ` [PATCH v5 03/13] arm64: dts: qcom: kaanapali: Add power-domain and iface clk for ice node Harshal Dev
2026-04-16 11:59 ` [PATCH v5 04/13] arm64: dts: qcom: lemans: " Harshal Dev
2026-04-20  8:53   ` Bartosz Golaszewski
2026-04-16 11:59 ` [PATCH v5 05/13] arm64: dts: qcom: monaco: " Harshal Dev
2026-04-16 11:59 ` [PATCH v5 06/13] arm64: dts: qcom: sc7180: " Harshal Dev
2026-04-16 11:59 ` [PATCH v5 07/13] arm64: dts: qcom: kodiak: " Harshal Dev
2026-04-16 11:59 ` [PATCH v5 08/13] arm64: dts: qcom: sm8450: " Harshal Dev
2026-04-16 11:59 ` [PATCH v5 09/13] arm64: dts: qcom: sm8550: " Harshal Dev
2026-04-16 11:59 ` [PATCH v5 10/13] arm64: dts: qcom: sm8650: " Harshal Dev
2026-04-16 11:59 ` [PATCH v5 11/13] arm64: dts: qcom: sm8750: " Harshal Dev
2026-04-16 11:59 ` [PATCH v5 12/13] arm64: dts: qcom: milos: " Harshal Dev
2026-04-21  9:27   ` Kuldeep Singh [this message]
2026-04-16 11:59 ` [PATCH v5 13/13] arm64: dts: qcom: eliza: " Harshal Dev
2026-04-21  9:38   ` Kuldeep Singh

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=743ae20d-1894-4566-992f-db8dccebee9f@oss.qualcomm.com \
    --to=kuldeep.singh@oss.qualcomm.com \
    --cc=abel.vesa@oss.qualcomm.com \
    --cc=abelvesa@kernel.org \
    --cc=akoskovich@pm.me \
    --cc=andersson@kernel.org \
    --cc=bmasney@redhat.com \
    --cc=brgl@kernel.org \
    --cc=conor+dt@kernel.org \
    --cc=cros-qcom-dts-watchers@chromium.org \
    --cc=davem@davemloft.net \
    --cc=davidwronek@gmail.com \
    --cc=devicetree@vger.kernel.org \
    --cc=dmitry.baryshkov@oss.qualcomm.com \
    --cc=ebiggers@google.com \
    --cc=gaurav.kashyap@oss.qualcomm.com \
    --cc=harshal.dev@oss.qualcomm.com \
    --cc=herbert@gondor.apana.org.au \
    --cc=jingyi.wang@oss.qualcomm.com \
    --cc=konrad.dybcio@oss.qualcomm.com \
    --cc=konradybcio@kernel.org \
    --cc=krzk+dt@kernel.org \
    --cc=krzk@kernel.org \
    --cc=krzysztof.kozlowski@oss.qualcomm.com \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-crypto@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=luca.weiss@fairphone.com \
    --cc=manivannan.sadhasivam@oss.qualcomm.com \
    --cc=neeraj.soni@oss.qualcomm.com \
    --cc=neil.armstrong@linaro.org \
    --cc=quic_molvera@quicinc.com \
    --cc=robh@kernel.org \
    --cc=tengfei.fan@oss.qualcomm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox