From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mout01.posteo.de (mout01.posteo.de [185.67.36.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 04BA2158524 for ; Tue, 4 Feb 2025 23:31:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.67.36.65 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738711871; cv=none; b=TTKycEWKi74U8P3T0JS4JLKRvsyXErY9X7lqSaZS7avbu3UtLuyftrStqrZZm8x3Va78R/c2b0cMvO47GDMcWpZ3SLB9XyGYvIwH8M7yKeg+2x0tv3n2UVU4/9Uy6N2mU2G6vB7p0GvyJOOfEK+8VGQojeugHAlmaTn2igdsgfg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738711871; c=relaxed/simple; bh=dJP28q5tsQaLJ5Y1dJlvwdNzH08V5OcPLoDVQOBCze0=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=Lmo7/JHhPZcsjZDlRj46pMGhTbNLmlUcF2cV+xEU9xnS7APoRqAbqdC6RrHP/+5dEfJu7NtVew0zGwjxiDaaaW8dUBweCy9EcLAleJ1T522rj8ajTjd98Bfc4LJ9GcuCYsoWG7XDffbEewztig5G5JXc5X2jdqUJNcnYLFuxhZo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=posteo.net; spf=pass smtp.mailfrom=posteo.net; dkim=pass (2048-bit key) header.d=posteo.net header.i=@posteo.net header.b=JeH//egA; arc=none smtp.client-ip=185.67.36.65 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=posteo.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=posteo.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=posteo.net header.i=@posteo.net header.b="JeH//egA" Received: from submission (posteo.de [185.67.36.169]) by mout01.posteo.de (Postfix) with ESMTPS id 43E8B240028 for ; Wed, 5 Feb 2025 00:31:06 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=posteo.net; s=2017; t=1738711866; bh=dJP28q5tsQaLJ5Y1dJlvwdNzH08V5OcPLoDVQOBCze0=; h=Date:From:To:Cc:Subject:Message-ID:MIME-Version:Content-Type: Content-Disposition:Content-Transfer-Encoding:From; b=JeH//egAxdP/noC5RoCMUR3PiFz8ld6VUlVtNLxdHdQ8SVa0TA1wMdmTUh+Elqwc2 YF4XtdkaZoixuZJffID+g8XfpiuAhFGAU7d6unfcWOvhDIoZStaY3pjDbYkJXsBBKy GosPqLrzztYl9ylpxFQK5ubT8pb5IttYHtOCXzS7TOSo/aiD+ceeNzAz4fMPciOouH FYWhMleejDIQaZg53HWg6BONww1nKdZ6C3q8JgXjy+kHpRXkh0MdXLAhUC9Qtce/Kx owEjoat9URBVHI6oDP9H4/fZSkfolngK6wRJ9x1TiXd1iPPQehe7ccX3oWIGO+a7NG 4D+DKLWIasuWw== Received: from customer (localhost [127.0.0.1]) by submission (posteo.de) with ESMTPSA id 4YnfkX6mVsz6tvZ; Wed, 5 Feb 2025 00:31:00 +0100 (CET) Date: Tue, 4 Feb 2025 23:31:00 +0000 From: =?utf-8?Q?J=2E_Neusch=C3=A4fer?= To: Rob Herring Cc: =?utf-8?Q?J=2E_Neusch=C3=A4fer?= , devicetree@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, Scott Wood , Madhavan Srinivasan , Michael Ellerman , Nicholas Piggin , Christophe Leroy , Naveen N Rao , Krzysztof Kozlowski , Conor Dooley , Damien Le Moal , Niklas Cassel , Herbert Xu , "David S. Miller" , Lee Jones , Vinod Koul , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Manivannan Sadhasivam , Bjorn Helgaas , =?utf-8?Q?J=2E_Neusch=C3=A4fer?= , Wim Van Sebroeck , Guenter Roeck , Mark Brown , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , linux-kernel@vger.kernel.org, linux-ide@vger.kernel.org, linux-crypto@vger.kernel.org, dmaengine@vger.kernel.org, linux-pci@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-spi@vger.kernel.org, linux-mtd@lists.infradead.org Subject: Re: [PATCH 6/9] dt-bindings: pci: Add fsl,mpc83xx-pcie bindings Message-ID: References: <20250126-ppcyaml-v1-0-50649f51c3dd@posteo.net> <20250126-ppcyaml-v1-6-50649f51c3dd@posteo.net> <20250127045004.GE3106458-robh@kernel.org> Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20250127045004.GE3106458-robh@kernel.org> On Sun, Jan 26, 2025 at 10:50:04PM -0600, Rob Herring wrote: > On Sun, Jan 26, 2025 at 07:59:01PM +0100, J. Neuschäfer wrote: > > Supplement Documentation/devicetree/bindings/pci/fsl,pci.txt with a more > > formal binding in YAML format. > > > > Signed-off-by: J. Neuschäfer > > --- [...] > > +title: Freescale MPC83xx PCI/PCI-X/PCIe controllers > > + > > +description: | > > + Binding for the PCI/PCI-X/PCIe host bridges on MPC8xxx SoCs. > > + See also: Documentation/devicetree/bindings/pci/fsl,pci.txt > > Can you move that information here. Will do. > > > + > > +maintainers: > > + - J. Neuschäfer > > + > > +allOf: > > + - $ref: /schemas/pci/pci-host-bridge.yaml# > > + > > +properties: > > + compatible: > > + oneOf: > > + - items: > > + - enum: > > + - fsl,mpc8308-pcie > > + - fsl,mpc8315-pcie > > + - fsl,mpc8377-pcie > > + - fsl,mpc8378-pcie > > + - const: fsl,mpc8314-pcie > > + - const: fsl,mpc8314-pcie > > + - items: > > + - const: fsl,mpc8360-pci > > + - const: fsl,mpc8349-pci > > + - const: fsl,mpc8349-pci > > + - items: > > + - const: fsl,mpc8540-pcix > > + - const: fsl,mpc8540-pci > > + - const: fsl,mpc8540-pci > > + - items: > > + - const: fsl,mpc8540-pcix > > + - const: fsl,mpc8540-pci > > + - const: fsl,mpc8548-pcie > > + - const: fsl,mpc8548-pcie > > + - const: fsl,mpc8641-pcie > > Move all the single 'const' to 1 enum entry. Will do > > + > > + reg: > > + minItems: 1 > > + items: > > + - description: internal registers > > + - description: config space access registers > > + > > + clock-frequency: > > + $ref: /schemas/types.yaml#/definitions/uint32 > > Don't need a type for this. Will change. Thanks, J. Neuschäfer