From: John Allen <john.allen@amd.com>
To: Herbert Xu <herbert@gondor.apana.org.au>
Cc: Tom Lendacky <thomas.lendacky@amd.com>,
"David S . Miller" <davem@davemloft.net>,
linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org,
Mario Limonciello <mario.limonciello@amd.com>
Subject: Re: [PATCH 3/3] crypto: ccp - Add support for PCI device 0x156E
Date: Wed, 31 May 2023 17:32:22 -0500 [thread overview]
Message-ID: <ZHfK9hsCyrAeRyYz@johallen-workstation> (raw)
In-Reply-To: <ZGfLrtmVOcCYiWFW@johallen-workstation>
On Fri, May 19, 2023 at 02:19:10PM -0500, John Allen wrote:
> On Thu, May 18, 2023 at 10:24:14PM -0500, Mario Limonciello wrote:
> > From: John Allen <john.allen@amd.com>
> >
> > Add a new CCP/PSP PCI device ID and new PSP register offsets.
> >
> > Signed-off-by: John Allen <john.allen@amd.com>
>
> Hi Herbert,
>
> Please hold off on applying this patch for now. I need to do a little
> bit more testing.
>
> Thanks,
> John
Hi Herbert,
I completed the aforementioned testing. This patch can be applied if
everything else in the series looks good.
Thanks,
John
>
> > ---
> > drivers/crypto/ccp/sp-pci.c | 15 +++++++++++++++
> > 1 file changed, 15 insertions(+)
> >
> > diff --git a/drivers/crypto/ccp/sp-pci.c b/drivers/crypto/ccp/sp-pci.c
> > index d0d70af0c4c0..b603ad9b8341 100644
> > --- a/drivers/crypto/ccp/sp-pci.c
> > +++ b/drivers/crypto/ccp/sp-pci.c
> > @@ -420,6 +420,14 @@ static const struct psp_vdata pspv5 = {
> > .intsts_reg = 0x10514, /* P2CMSG_INTSTS */
> > };
> >
> > +static const struct psp_vdata pspv6 = {
> > + .sev = &sevv2,
> > + .tee = &teev2,
> > + .feature_reg = 0x109fc, /* C2PMSG_63 */
> > + .inten_reg = 0x10510, /* P2CMSG_INTEN */
> > + .intsts_reg = 0x10514, /* P2CMSG_INTSTS */
> > +};
> > +
> > #endif
> >
> > static const struct sp_dev_vdata dev_vdata[] = {
> > @@ -478,6 +486,12 @@ static const struct sp_dev_vdata dev_vdata[] = {
> > .bar = 2,
> > #ifdef CONFIG_CRYPTO_DEV_SP_PSP
> > .psp_vdata = &pspv5,
> > +#endif
> > + },
> > + { /* 8 */
> > + .bar = 2,
> > +#ifdef CONFIG_CRYPTO_DEV_SP_PSP
> > + .psp_vdata = &pspv6,
> > #endif
> > },
> > };
> > @@ -491,6 +505,7 @@ static const struct pci_device_id sp_pci_table[] = {
> > { PCI_VDEVICE(AMD, 0x15C7), (kernel_ulong_t)&dev_vdata[6] },
> > { PCI_VDEVICE(AMD, 0x1649), (kernel_ulong_t)&dev_vdata[6] },
> > { PCI_VDEVICE(AMD, 0x17E0), (kernel_ulong_t)&dev_vdata[7] },
> > + { PCI_VDEVICE(AMD, 0x156E), (kernel_ulong_t)&dev_vdata[8] },
> > /* Last entry must be zero */
> > { 0, }
> > };
> > --
> > 2.34.1
> >
next prev parent reply other threads:[~2023-05-31 22:32 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-19 3:24 [PATCH 0/3] New hardware support Mario Limonciello
2023-05-19 3:24 ` [PATCH 1/3] crypto: ccp - Validate that platform access mailbox registers are declared Mario Limonciello
2023-05-19 3:24 ` [PATCH 2/3] crypto: ccp - Add support for PCI device 0x17E0 Mario Limonciello
2023-05-19 3:24 ` [PATCH 3/3] crypto: ccp - Add support for PCI device 0x156E Mario Limonciello
2023-05-19 17:44 ` Limonciello, Mario
2023-05-19 19:19 ` John Allen
2023-05-31 22:32 ` John Allen [this message]
2023-06-02 10:23 ` [PATCH 0/3] New hardware support Herbert Xu
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