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From: Herbert Xu <herbert@gondor.apana.org.au>
To: Arnd Bergmann <arnd@arndb.de>
Cc: Corentin Labbe <clabbe.montjoie@gmail.com>,
	Klaus Kudielka <klaus.kudielka@gmail.com>,
	Eric Biggers <ebiggers@kernel.org>,
	regressions@lists.linux.dev, linux-kernel@vger.kernel.org,
	Linux Crypto Mailing List <linux-crypto@vger.kernel.org>,
	"'bbrezillon@kernel.org'" <bbrezillon@kernel.org>,
	EBALARD Arnaud <Arnaud.Ebalard@ssi.gouv.fr>,
	Romain Perier <romain.perier@gmail.com>
Subject: Re: [PATCH] crypto: marvell/cesa - Avoid empty transfer descriptor
Date: Thu, 22 May 2025 11:13:56 +0800	[thread overview]
Message-ID: <aC6WdO4E6ugCm42K@gondor.apana.org.au> (raw)
In-Reply-To: <1024b1b7-9d58-4db4-a71a-108f6df7b623@app.fastmail.com>

On Wed, May 21, 2025 at 01:36:06PM +0200, Arnd Bergmann wrote:
>
> Ok. Which SoC exactly is this on? Armada XP or Armada 385?

I have no idea :) Corentin, can you tell Arnd what you're using
for the tests?

> I see. Just a few more ideas what it could be in case it's not
> what you suspect:

It appears to be proven now.  After replacing the coherent memroy
with kmalloc + dma_map_single, it actually works reliably to pass
all the crypto fuzz tests (hmac is still failing but I think that's
a different issue).

Maybe I'm misreading the code, but I thought that dma_map_single on
this machine should actually be a no-op because the device is marked
as coherent? Arnd, Christophe?

But it's clearly making a difference.  My suspicion arose because
the fully linear hash digests where all data came from the user
were never failing.  It was only failing when some of the data was
coming from the bounce buffer within the driver.  That bounce buffer
was setup with dma_map_pool (each being 64 bytes long).

> - the SRAM gets mapped into kernel space using ioremap(), which
>   on Armada 375/38x uses MT_UNCACHED rather than MT_DEVICE as
>   a workaround for a possible deadlock on actual MMIO registers.
>   It's possible that the SRAM should be mapped using a different
>   map flag to ensure it's actually consistent. If a store is
>   posted to the SRAM, it may still be in flight at the time that
>   the DMA master looks at it.

AFAICS we're not touching the SRAM directly.  Everything is mediated
with the tdma unit on the cesa device.  So the cesa tdma unit is
copying the data to and from the SRAM with DMA.

> - I see a lot of chaining of DMA descriptors, but no dma_wmb()
>   or spinlock. A dma_wmb() or stronger (wmb, dma_mb, mb)
>   is probably required between writing to a coherent descriptor
>   and making it visible from another one. A spinlock is
>   of course needed if you have multiple CPUs adding data
>   into a shared linked list (I think this one is not shared
>   but haven't confirmed that).

Yes that chaining is definitely broken.  However, I don't think
it's causing the corruption.  We've already tried disabling the
chaining and it makes no difference whatsoever.

In any case the tip of cryptodev now disables the broken chaining
so it should no longer be an issue going forward.

Thanks,
-- 
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

  reply	other threads:[~2025-05-22  3:14 UTC|newest]

Thread overview: 77+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <ef7c7a96a73161e0f5061503242a8d3eddef121f.camel@gmail.com>
2024-10-06  9:11 ` [REGRESSION] alg: ahash: Several tests fail during boot on Turris Omnia Herbert Xu
2024-10-06  9:23   ` Klaus Kudielka
2024-10-07  8:27     ` Herbert Xu
2024-10-07 20:57       ` Klaus Kudielka
2024-10-09  8:34         ` Herbert Xu
2024-10-09  8:38           ` [PATCH] crypto: marvell/cesa - Disable hash algorithms Herbert Xu
2024-10-09 16:48           ` [REGRESSION] alg: ahash: Several tests fail during boot on Turris Omnia Klaus Kudielka
2024-10-10  6:05             ` Herbert Xu
2024-10-10  8:24               ` Herbert Xu
2024-10-10 17:35                 ` Klaus Kudielka
2024-10-15  4:52                   ` Herbert Xu
2024-10-15 17:38                     ` Klaus Kudielka
2024-10-16  4:27                       ` Herbert Xu
2024-10-16  5:51                         ` Klaus Kudielka
2024-10-16  9:53                           ` Herbert Xu
2024-11-12 19:33                             ` Klaus Kudielka
2024-11-13  9:57                               ` Thorsten Leemhuis
2025-05-06 13:19                         ` Herbert Xu
2025-05-07  8:43                           ` [PATCH] crypto: marvell/cesa - Do not chain submitted requests Herbert Xu
2025-05-07 15:16                             ` Corentin Labbe
2025-05-08  5:15                               ` [v2 PATCH] " Herbert Xu
2025-05-08  5:22                                 ` [v3 " Herbert Xu
2025-05-08 12:53                                   ` Corentin Labbe
2025-05-08 13:10                                     ` Herbert Xu
2025-05-08 13:43                                       ` Corentin Labbe
2025-05-09  3:13                                         ` Herbert Xu
2025-05-09  3:19                                         ` Herbert Xu
2025-05-09  8:11                                           ` Herbert Xu
2025-05-09 11:01                                             ` Corentin Labbe
2025-05-10  1:15                                               ` Herbert Xu
2025-05-10  1:37                                                 ` Herbert Xu
2025-05-10  1:44                                                   ` Herbert Xu
2025-05-10 10:41                                         ` [PATCH] crypto: marvell/cesa - Handle zero-length skcipher requests Herbert Xu
2025-05-10  8:32                                   ` [v3 PATCH] crypto: marvell/cesa - Do not chain submitted requests Klaus Kudielka
2025-05-10  9:05                                     ` Herbert Xu
2025-05-10  9:38                                       ` Klaus Kudielka
2025-05-10 10:19                                         ` Herbert Xu
2025-05-10 10:43                                         ` [PATCH] crypto: marvell/cesa - Avoid empty transfer descriptor Herbert Xu
2025-05-10 11:14                                           ` Corentin Labbe
2025-05-10 11:39                                             ` Herbert Xu
2025-05-10 13:02                                             ` Herbert Xu
2025-05-10 15:07                                           ` Klaus Kudielka
2025-05-11  3:22                                             ` Herbert Xu
2025-05-11 16:39                                               ` Klaus Kudielka
2025-05-13  9:20                                                 ` Herbert Xu
2025-05-14  5:12                                                   ` Klaus Kudielka
2025-05-14  5:14                                                     ` Herbert Xu
2025-05-15 17:53                                                       ` Klaus Kudielka
2025-05-15 18:21                                                         ` Eric Biggers
2025-05-15 18:45                                                           ` Klaus Kudielka
2025-05-15 23:25                                                             ` Herbert Xu
2025-05-16 12:41                                                               ` Corentin Labbe
2025-05-16 12:45                                                                 ` Herbert Xu
2025-05-17 11:24                                                                   ` Corentin Labbe
2025-05-18  7:58                                                                     ` Herbert Xu
2025-05-21  5:06                                                                       ` Herbert Xu
2025-05-21  9:16                                                                         ` Herbert Xu
2025-05-21  9:58                                                                           ` Arnd Bergmann
2025-05-21 10:24                                                                             ` Herbert Xu
2025-05-21 11:36                                                                               ` Arnd Bergmann
2025-05-22  3:13                                                                                 ` Herbert Xu [this message]
2025-05-22 20:08                                                                                 ` Corentin Labbe
2025-05-21 10:45                                                                           ` Corentin Labbe
2025-05-21 10:56                                                                             ` Herbert Xu
2025-05-21 13:58                                                                               ` Corentin Labbe
2025-05-22  3:01                                                                                 ` crypto: marvell/cesa - dma_alloc_coherent broken but kmalloc + dma_map_single works Herbert Xu
2025-05-22  7:38                                                                                   ` Herbert Xu
2025-05-22 20:07                                                                                     ` Corentin Labbe
2025-05-23 11:46                                                                                       ` Herbert Xu
2025-05-28  9:58                                                                                       ` Herbert Xu
2025-05-29 11:17                                                                                         ` Corentin Labbe
2025-05-22 11:13                                                                                   ` Herbert Xu
2025-05-16  4:12                                                         ` [PATCH] crypto: marvell/cesa - Avoid empty transfer descriptor Herbert Xu
2025-05-16 17:36                                                           ` Klaus Kudielka
2025-06-17  5:32                                                             ` Klaus Kudielka
2025-06-17  5:36                                                               ` Herbert Xu
2025-05-08 12:49                                 ` [v2 PATCH] crypto: marvell/cesa - Do not chain submitted requests Corentin Labbe

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