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Mon, 12 May 2025 23:12:25 -0700 (PDT) Received: from DC6WP-EXCH02.marvell.com (10.76.176.209) by DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Mon, 12 May 2025 23:12:25 -0700 Received: from maili.marvell.com (10.69.176.80) by DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Mon, 12 May 2025 23:12:24 -0700 Received: from optiplex (unknown [10.28.34.253]) by maili.marvell.com (Postfix) with SMTP id AC5013F70A4; Mon, 12 May 2025 23:12:16 -0700 (PDT) Date: Tue, 13 May 2025 11:42:15 +0530 From: Tanmay Jagdale To: Simon Horman CC: , , , , , , , , , , , , , , , , , , , , , , , , "Kiran Kumar K" , Nithin Dabilpuram Subject: Re: [net-next PATCH v1 07/15] octeontx2-af: Add support for SPI to SA index translation Message-ID: References: <20250502132005.611698-1-tanmay@marvell.com> <20250502132005.611698-8-tanmay@marvell.com> <20250507124517.GC3339421@horms.kernel.org> Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20250507124517.GC3339421@horms.kernel.org> X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNTEzMDA1NiBTYWx0ZWRfX4pgD43kFI/cW CIA1lqbjCkuRcZJSt2JhPK7hVaLOUs1WX1bUQC3dwCTYUAln2KkbBAG3//SgFaalEtP04IjC5Yb hrFnWqd1eAX8e7MJNXPKR8eMSU5diTXFNtATaKa7tETF/Jr0BXsqYzVkEeN6nefiqFaHgpvYZkw ymM3vv1jTnTLKAk7YEEVCCWpSHIkA+1TppwVhmhKFedC554OseCwW3g1f3AMrirzQG1BwJw8VAD T8l2Lel64ytBkBFyB/R1qB6eFajEGUForqrOfe6KiWUHi9DKf/1gu5SK6Q6oHN8/0BX2NoKr5vt 93xJ50Am0f85nEwmThno78xdVNnNf5zIcAv43aK70CA1+NCYdTOXSjKmJkwq03FxNZNkV61f+iu /c5bL8AnmB1+JcKNWnLcNyxjPNZoK07JSL2edfWNfOfPc24xaj8OWBfBEkijcx9H131j6MHi X-Authority-Analysis: v=2.4 cv=V6x90fni c=1 sm=1 tr=0 ts=6822e2c9 cx=c_pps a=gIfcoYsirJbf48DBMSPrZA==:117 a=gIfcoYsirJbf48DBMSPrZA==:17 a=kj9zAlcOel0A:10 a=dt9VzEwgFbYA:10 a=VwQbUJbxAAAA:8 a=M5GUcnROAAAA:8 a=fMs116VxaZ394lWZzjIA:9 a=CjuIK1q_8ugA:10 a=OBjm3rFKGHvpk9ecZwUJ:22 X-Proofpoint-ORIG-GUID: Vp5ijUOX21Gbk8xEyHqlbuNUmgRkwazK X-Proofpoint-GUID: Vp5ijUOX21Gbk8xEyHqlbuNUmgRkwazK X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-05-12_07,2025-05-09_01,2025-02-21_01 On 2025-05-07 at 18:15:17, Simon Horman (horms@kernel.org) wrote: > On Fri, May 02, 2025 at 06:49:48PM +0530, Tanmay Jagdale wrote: > > From: Kiran Kumar K > > > > In case of IPsec, the inbound SPI can be random. HW supports mapping > > SPI to an arbitrary SA index. SPI to SA index is done using a lookup > > in NPC cam entry with key as SPI, MATCH_ID, LFID. Adding Mbox API > > changes to configure the match table. > > > > Signed-off-by: Kiran Kumar K > > Signed-off-by: Nithin Dabilpuram > > Signed-off-by: Sunil Kovvuri Goutham > > Signed-off-by: Tanmay Jagdale > > ... > > > diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h > > index 715efcc04c9e..5cebf10a15a7 100644 > > --- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h > > +++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h > > @@ -326,6 +326,10 @@ M(NIX_READ_INLINE_IPSEC_CFG, 0x8023, nix_read_inline_ipsec_cfg, \ > > M(NIX_LF_INLINE_RQ_CFG, 0x8024, nix_lf_inline_rq_cfg, \ > > nix_rq_cpt_field_mask_cfg_req, \ > > msg_rsp) \ > > +M(NIX_SPI_TO_SA_ADD, 0x8026, nix_spi_to_sa_add, nix_spi_to_sa_add_req, \ > > + nix_spi_to_sa_add_rsp) \ > > +M(NIX_SPI_TO_SA_DELETE, 0x8027, nix_spi_to_sa_delete, nix_spi_to_sa_delete_req, \ > > + msg_rsp) \ > > Please keep line length to 80 columns or less in Networking code, > unless it reduces readability. > > In this case perhaps: > > M(NIX_SPI_TO_SA_DELETE, 0x8027, nix_spi_to_sa_delete, \ > nix_spi_to_sa_delete_req, \ > msg_rsp) \ > > Likewise throughout this patch (set). > checkpatch.pl --max-line-length=80 is your friend. ACK. I will adhere to the 80 columns in the next version. Regards, Tanmay > > > M(NIX_MCAST_GRP_CREATE, 0x802b, nix_mcast_grp_create, nix_mcast_grp_create_req, \ > > nix_mcast_grp_create_rsp) \ > > M(NIX_MCAST_GRP_DESTROY, 0x802c, nix_mcast_grp_destroy, nix_mcast_grp_destroy_req, \ > > ...