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From: Herbert Xu <herbert@gondor.apana.org.au>
To: Zenghui Yu <yuzenghui@huawei.com>
Cc: linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org,
	davem@davemloft.net, liulongfang@huawei.com,
	qianweili@huawei.com, wangzhou1@hisilicon.com,
	shenyang39@huawei.com, wanghaibin.wang@huawei.com
Subject: Re: [PATCH] crypto: hisilicon - Use fine grained DMA mapping direction
Date: Mon, 23 Jun 2025 17:25:55 +0800	[thread overview]
Message-ID: <aFkdo8swvmW1Z9dQ@gondor.apana.org.au> (raw)
In-Reply-To: <20250618100026.1586-1-yuzenghui@huawei.com>

On Wed, Jun 18, 2025 at 06:00:26PM +0800, Zenghui Yu wrote:
> The following splat was triggered when booting the kernel built with
> arm64's defconfig + CRYPTO_SELFTESTS + DMA_API_DEBUG.
> 
>  ------------[ cut here ]------------
>  DMA-API: hisi_sec2 0000:75:00.0: cacheline tracking EEXIST, overlapping mappings aren't supported
>  WARNING: CPU: 24 PID: 1273 at kernel/dma/debug.c:596 add_dma_entry+0x248/0x308
> 
>  Call trace:
>   add_dma_entry+0x248/0x308 (P)
>   debug_dma_map_sg+0x208/0x3e4
>   __dma_map_sg_attrs+0xbc/0x118
>   dma_map_sg_attrs+0x10/0x24
>   hisi_acc_sg_buf_map_to_hw_sgl+0x80/0x218 [hisi_qm]
>   sec_cipher_map+0xc4/0x338 [hisi_sec2]
>   sec_aead_sgl_map+0x18/0x24 [hisi_sec2]
>   sec_process+0xb8/0x36c [hisi_sec2]
>   sec_aead_crypto+0xe4/0x264 [hisi_sec2]
>   sec_aead_encrypt+0x14/0x20 [hisi_sec2]
>   crypto_aead_encrypt+0x24/0x38
>   test_aead_vec_cfg+0x480/0x7e4
>   test_aead_vec+0x84/0x1b8
>   alg_test_aead+0xc0/0x498
>   alg_test.part.0+0x518/0x524
>   alg_test+0x20/0x64
>   cryptomgr_test+0x24/0x44
>   kthread+0x130/0x1fc
>   ret_from_fork+0x10/0x20
>  ---[ end trace 0000000000000000 ]---
>  DMA-API: Mapped at:
>   debug_dma_map_sg+0x234/0x3e4
>   __dma_map_sg_attrs+0xbc/0x118
>   dma_map_sg_attrs+0x10/0x24
>   hisi_acc_sg_buf_map_to_hw_sgl+0x80/0x218 [hisi_qm]
>   sec_cipher_map+0xc4/0x338 [hisi_sec2]
> 
> This occurs in selftests where the input and the output scatterlist point
> to the same underlying memory (e.g., when tested with INPLACE_TWO_SGLISTS
> mode).
> 
> The problem is that the hisi_sec2 driver maps these two different
> scatterlists using the DMA_BIDIRECTIONAL flag which leads to overlapped
> write mappings which are not supported by the DMA layer.
> 
> Fix it by using the fine grained and correct DMA mapping directions. While
> at it, switch the DMA directions used by the hisi_zip driver too.
> 
> Signed-off-by: Zenghui Yu <yuzenghui@huawei.com>
> ---
> 
> The hisi_zip part has not been tested due to a lack of HW. I'd appreciate
> it if someone could help to test it.
> 
>  drivers/crypto/hisilicon/sec2/sec_crypto.c | 21 +++++++++++++--------
>  drivers/crypto/hisilicon/sgl.c             | 15 ++++++++-------
>  drivers/crypto/hisilicon/zip/zip_crypto.c  | 13 +++++++------
>  include/linux/hisi_acc_qm.h                |  4 ++--
>  4 files changed, 30 insertions(+), 23 deletions(-)

Patch applied.  Thanks.
-- 
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

      parent reply	other threads:[~2025-06-23  9:25 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-18 10:00 [PATCH] crypto: hisilicon - Use fine grained DMA mapping direction Zenghui Yu
2025-06-19  4:03 ` liulongfang
2025-06-23  9:25 ` Herbert Xu [this message]

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