From: Herbert Xu <herbert@gondor.apana.org.au>
To: Ralf Lici <ralf@mandelbit.com>
Cc: linux-crypto@vger.kernel.org, Antoine Tenart <atenart@kernel.org>,
"David S. Miller" <davem@davemloft.net>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH crypto 2/2] crypto: safexcel - Map AEAD buffers with accurate DMA directions
Date: Wed, 23 Sep 2026 18:32:25 +1000 [thread overview]
Message-ID: <arOOmSnC1NxvG1nw@gondor.apana.org.au> (raw)
In-Reply-To: <20260923072646.86229-1-ralf@mandelbit.com>
On Wed, Sep 23, 2026 at 09:26:46AM +0200, Ralf Lici wrote:
>
> No, the regions do not need to occupy separate sg entries, the patch
> selects the direction conservatively for the whole entry.
>
> For a completely linear in-place request, the entry overlaps the output
> range and is therefore mapped DMA_BIDIRECTIONAL. For an out-of-place
> request, the source is mapped DMA_TO_DEVICE. For example, a single
> destination entry covering:
>
> [ AAD | ciphertext | tag ]
>
> has a logical output range covering only:
>
> [ ciphertext | tag ]
>
> Since the entry also contains the preserved AAD prefix, it is classified
> as mixed and mapped DMA_BIDIRECTIONAL. The same applies if an entry
> extends beyond the end of the output range.
Wait, I think this suggests that the caller is giving us bogus
input.
If the input is out-of-place, it shouldn't contain overlapping
data.
Which caller is this?
Thanks,
--
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
next prev parent reply other threads:[~2026-09-23 8:32 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-15 11:32 [PATCH crypto 0/2] crypto: safexcel: fix AEAD DMA mapping and cleanup Ralf Lici
2026-09-15 11:32 ` [PATCH crypto 1/2] crypto: safexcel - Avoid unmapping failed DMA mappings Ralf Lici
2026-09-15 11:32 ` [PATCH crypto 2/2] crypto: safexcel - Map AEAD buffers with accurate DMA directions Ralf Lici
2026-09-23 5:30 ` Herbert Xu
2026-09-23 7:26 ` Ralf Lici
2026-09-23 8:32 ` Herbert Xu [this message]
2026-09-23 9:13 ` Ralf Lici
2026-09-28 5:12 ` Herbert Xu
2026-09-28 10:25 ` Ralf Lici
2026-10-08 7:53 ` Herbert Xu
2026-10-08 8:21 ` Ralf Lici
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